MOSA
MS6266
6-Channel Electronic Volume Controller
6-Channel Volume Controller
Gain and Attenuation 16~-79dB
Low voltage, High Channel Separation
FEATURES
‧Operation
range: 2.7V~5.5V
‧Low
power consumption
‧Gain/Attenuation:
16dB to –79dB at 1dB/step
‧Good
PSRR
‧I
2
C interface
‧Pop
noise free
‧Housed
in SSOP20, SOP20
APPLICATIONS
‧Multimedia
system
‧Hi-Fi
audio system
‧Car
audio
‧Portable
audio equipment
DESCRIPTION
The MS6266 is a 6-channel volume controller IC with gain and attenuation. It uses CMOS technology specially for the
low voltage application with low noise, rail-to-rail output. The MS6266 provide an I
2
C control interface with gain /
attenuation range of 16dB to -79dB, 1dB/step. The initial condition is set to be maximum attenuation –79dB and mute
on mode when the power is on.
PIN CONFIGURATION
Symbol
IN1
IN2
IN3
AC2
DGND
SCL
SDA
IN4
IN5
IN6
OUT6
OUT5
OUT4
GND
V
REF
V
DD
AC1
OUT3
OUT2
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Description
1
st
channel input
2
nd
channel input
3
rd
channel input
Address code 2
Digital Ground
I
2
C clock input
I
2
C data input
4
th
channel input
5 channel input
6 channel input
6
th
channel output
5
th
channel output
4
th
channel output
Analog ground
Reference voltage = 1/2V
DD
Positive supply voltage
Address code 1
3
rd
channel output
2
nd
channel output
th
th
IN1
1
IN2
2
IN3
3
AC2
4
DGND
5
SCL
6
SDA
7
IN4
8
IN5
9
IN6
10
20
OUT1
19
OUT2
18
OUT3
17
AC1
MS6266
16
V
DD
15
V
REF
14
GND
13
OUT4
12
OUT5
11
OUT6
OUT1
20
1
st
channel output
Note: 1. The address codes have four types, selected by AC1and AC2.
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MOSA
BLOCK DIAGRAM
IN1
-1dB/Step
-10dB/Step
MS6266
6-Channel Electronic Volume Controller
2dB/Step
OUT1
IN2
-1dB/Step
-10dB/Step
2dB/Step
OUT2
IN6
-1dB/Step
-10dB/Step
2dB/Step
OUT6
V
REF
AC1
AC2
I
2
C Interface
Reference
source
V
DD
GND
SCL
SDA
DGND
V
REF
ORDERING INFORMATION
Package
20-Pin SOP
20-Pin SOP
20-Pin SOP (lead free)
20-Pin SOP (lead free)
20-Pin SSOP
20-Pin SSOP
20-Pin SSOP (lead free)
20-Pin SSOP (lead free)
Part number
MS6266TR
MS6266U
MS6266GTR
MS6266GU
MS6266SSTR
MS6266SSU
MS6266SSGTR
MS6266SSGU
Packaging Marking
MS6266
MS6266
MS6266G
MS6266G
MS6266
MS6266
MS6266G
MS6266G
Transport Media
1k Units Tape and Reel
35 Units Tube
1k Units Tape and Reel
35 Units Tube
2.5k Units Tape and Reel
50 Units Tube
2.5k Units Tape and Reel
50 Units Tube
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DD
V
ESD
T
STG
T
A
T
J
T
S
R
THJA
Supply Voltage
Electrostatic Handling
Storage Temperature Range
Operating Ambient Temperature Range
Maximum Junction Temperature
Soldering Temperature, 10 seconds
Thermal Resistance from Junction to Ambient in Free Air
SOP20
SSOP20
Parameter
Rating
6
-3000 to 3000
-65 to 150
-40 to 85
150
260
210
210
Unit
V
V
℃
℃
℃
℃
℃/W
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MOSA
OPERATING RATINGS
Symbol
V
DD
Supply Voltage
Parameter
MS6266
6-Channel Electronic Volume Controller
Min
2.7
Typ
-
Max
5.5
Unit
V
5V ELECTRICAL CHARACTERISTICS
(V
DD
=5.0V, V
SS
=0V, Attenuation=0dB, Gain=0dB, f=1kHz, V
O
=0dBV, V
REF
Cap=10uF; unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC Characteristics
I
Q
A
GA
A
STEP
E
GA
E
IGA
CS
PSRR
MUTE
Rin
Rout
Vo
THD+N
S/N
V
IH
V
IL
Quiescent current
Gain/Attenuation
Gain/Attenuation step
Gain/Attenuation step error
Interchannel gin/attenuation error
Channel separation
Power supply rejection ratio
Mute Attenuation
Input Impedance
Output Impedance
Maximum output voltage swing
Total harmonic distortion plus
noise
Signal-to-noise ratio
Bus high input level
Bus low input level
V
O
=4.8Vpp
(THD+N)/S < 0.1%
Cap = 10uF (100Hz)
Vin=0dBV
Max gain
Max attenuation
-
-
-
-
-
-
95
-
-
18
-
-
-
95
-
0.3V
DD
10.4
16
-79
1
0.3
0.3
105
53
85
20
50
4.8
-69
100
-
-
11
-
-
-
-
-
-
-
-
-
100
-
-64
-
0.7V
DD
-
mA
dB
dB
dB
dB
dB
dB
dB
dB
kΩ
Ω
Vpp
dB
dB
V
V
AC Characteristics
Bus Characteristics
2.7V ELECTRICAL CHARACTERISTICS
(V
DD
=2.7V, V
SS
=0V, Attenuation=0dB, Gain=0dB, f=1kHz, V
O
=-3dBV, V
REF
Cap=10uF; unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC Characteristics
I
Q
CS
PSRR
MUTE
Vo
THD+N
S/N
Quiescent current
Channel separation
Power supply rejection ratio
Mute Attenuation
Maximum output voltage swing
Total harmonic distortion plus
noise
Signal-to-noise ratio
V
O
=2.6Vpp
Cap = 10uF (100Hz)
Vin=-3dBV
(THD+N)/S < 0.1%
-
90
-
-
-
-
85
8.2
100
51
80
2.6
-69
90
8.8
-
-
-
-
-64
-
mA
dB
dB
dB
Vpp
dB
dB
AC Characteristics
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MOSA
TYPICAL PERFORMANCE CHARACTERISTICS
(Ta=25℃, R
L
=100k
Ω
, V
REF
Cap=10uF; unless otherwise specified)
MS6266
6-Channel Electronic Volume Controller
f=20kHz
f=20Hz
f=20Hz
f=20kHz
f=20Hz
f=20kHz
THD+N (%)
THD+N (%)
f=1kHz
THD+N (%)
f=1kHz
f=1kHz
V
DD
=5V
V
DD
=3.3V
V
DD
=2.7V
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
THD+N vs. output voltage
THD+N vs. output voltage
THD+N vs. output voltage
V
DD
=5V
V
O
=0dBV
CHANNEL SEPARATION (dB)
V
DD
=3.3V
V
O
=-3dBV
V
DD
=2.7V
V
O
=-3dBV
THD+N (%)
V
DD
=3.3V
V
O
=-3dBV
V
DD
=2.7V
V
O
=-3dBV
V
DD
=5V
V
O
=0dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
QUIESCENT CURRENT (mA)
SUPPLY VOLTAGE (V)
THD+N vs. frequency
Channel separation vs. frequency
Quiescent current vs. supply voltage
CAP=22uF
CAP=22uF
CAP=22uF
PSRR (dB)
PSRR (dB)
CAP=10uF
CAP=10uF
PSRR (dB)
CAP=10uF
CAP=2.2uF
CAP=2.2uF
CAP=2.2uF
V
DD
=5V
V
RR
=-20dBV
V
DD
=3.3V
V
RR
=-20dBV
V
DD
=2.7V
V
RR
=-20dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
PSRR vs. frequency
PSRR vs. frequency
PSRR vs. frequency
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MOSA
I
2
C BUS DESCRIPTION
Start and stop conditions
MS6266
6-Channel Electronic Volume Controller
A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop
condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing
diagram below.
SCL
SDA
Start
Stop
SCL : Serial Clock Line, SDA : Serial Data Line
Data validity
A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and
LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below.
SDA
SCL
Data line
stable,
Data valid
Data
change
allowed
Byte format
Every byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transmitted first.
Acknowledge
During the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral
(audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that
the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below.
SCL
1
2
3
7
8
9
SDA
MSB
Start
Acknowledge
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise,
the SDA line will remain at the HIGH level during the ninth (9
th
) clock pulse. In this case, the master transmitter can
generate the STOP information in order to abort the transfer.
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