LTC3428
4A, 2MHz Dual Phase
Step-Up DC/DC Converter
in 3mm
×
3mm DFN
DESCRIPTIO
The LTC
®
3428 is a 2-phase, current mode boost con-
verter, capable of supplying 2A at 5V from a 3.3V input.
Two 93mΩ, 2A N-channel MOSFET switches allow the
LTC3428 to deliver high efficiency from input voltages as
low as 1.6V.
External parts count and size are minimized by a 1MHz
switching frequency and a 2-phase design. Two phase
operation significantly reduces peak inductor currents
and capacitor ripple current, doubling the effective switch-
ing frequency and minimizing inductor and capacitor size.
External compensation allows the feedback loop response
to be optimized for a particular application.
Other features include: an active low shutdown pin re-
duces supply current to below 1µA, internal soft-start,
antiringing control and thermal shutdown. The LTC3428
is available in a low profile (0.75mm) 10-lead (3mm
×
3mm) DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FEATURES
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■
■
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■
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■
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■
High Efficiency: Up to 92%
2-Phase Control Reduces Output Voltage Ripple
5V at 2A from 3.3V Input
3.3V at 1.5A from 1.8V Input
1.6V to 5.25V Adjustable Output Voltage
1.6V to 4.5V Input Range
Internal Soft-Start Operation
Low Shutdown Current: <1µA
Uses Small Surface Mount Components
10-Pin 3mm
×
3mm DFN Package
APPLICATIO S
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Networking Equipment
Handheld Instruments
Digital Cameras
Distributed Power
Local 3.3V to 5V Conversion
TYPICAL APPLICATIO
3.3V to 5V at 2A Converter
95
V
IN
3.3V
2.2µH*
V
IN
OFF ON
10k
1000pF
22pF
SHDN
V
C
AGND
PGNDA
LTC3428
V
OUT
SWA
SWB
FB
PGNDB
22µF****
3428 TA01
EFFICIENCY (%)
4.7µF***
2.2µH*
V
OUT
5V/2A
**
383k
**
121k
* TOKO FDV06302R2
** PHILIPS PMEG1020
*** TAIYO YUDEN X5R JMK212BJ475MD
**** TAIYO YUDEN X5R JMK316BJ226ML
U
U
U
Efficiency vs Load Current
90
85
80
75
70
65
60
55
50
45
0.1
LOAD CURRENT (A)
3428 TA02
V
IN
= 3.3V
V
OUT
= 5V
L = 2.2µH
1
2
3428f
1
LTC3428
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
PGNDA
SWA
V
OUT
SHDN
V
C
1
2
3
4
5
11
V
IN
, V
OUT
, SWA, SWB Voltage ....................... – 0.3 to 6V
SWA, SWB Voltage, Pulsed, <100ns ......................... 7V
SHDN, VC Voltage ......................................... – 0.3 to 6V
FB Voltage ................................... – 0.3 to (V
OUT
+ 0.3V)
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
10 PGNDB
9 SWB
8 V
IN
7 AGND
6 FB
ORDER PART
NUMBER
LTC3428EDD
DD PART
MARKING
LBBG
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
EXPOSED PAD MUST BE SOLDERED
TO GROUND PLANE ON PCB
T
JMAX
= 125°C,
θ
JA
= 45°C/W,
θ
JC
= 3°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.3V, V
OUT
= 5V unless otherwise noted.
PARAMETER
Minimum Startup Voltage
Quiescent Current, V
OUT
Quiescent Current, V
IN
Shutdown Current
Switching Frequency
FB Regulated Voltage
FB Input Current
Error Amp Transconductance
Output Adjust Voltage
NMOS Switch Leakage
NMOS Switch On Resistance
NMOS Current Limit
SHDN Input Threshold
SHDN Input Current
Maximum Duty Cycle
Minimum Duty Cycle
Current Limit Delay to Output
(Note 3)
●
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
SHDN = V
IN
SHDN = V
IN
SHDN = 0V
Per Phase
V
FB
= 1.24V
●
●
MIN
TYP
1.5
100
1.3
MAX
1.6
200
2.0
1
1.2
1.268
50
5.25
UNITS
V
µA
mA
µA
MHz
V
nA
µS
V
µA
Ω
A
0.8
1.219
1.0
1.243
1
170
1.6
V
SWA
, V
SWB
= 5.5V, Per Phase
V
OUT
= 5V, Per Phase
Per Phase
●
●
0.1
0.093
2
0.4
80
2.5
0.8
0.01
87
2.5
1.5
1
0
40
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LTC3428E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
Specification is guaranteed by design and not 100% tested in
production.
Note 4:
This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
2
U
V
µA
%
%
ns
3428f
W
U
U
W W
W
LTC3428
TYPICAL PERFOR A CE CHARACTERISTICS
All characteristic curves at T
A
= 25°C unless otherwise noted.
SW Pin and Inductor Current in
Discontinuous Mode, Demonstrating
Anti-Ring Circuit Operation
SWA, SWB Switching Waveforms
Transient Response, 0.5A to 1.5A
SWA
5V/DIV
SWB
500mA/DIV
500mA/DIV
500ns/DIV
3428 G01
Output Voltage Ripple with 22µF
Ceramic Capacitor
95
90
85
EFFICIENCY (%)
80
75
70
65
60
55
0.05
2.5V TO 5V
R
DS(ON)
(mΩ)
50mV/DIV
500ns/DIV
3428 G04
SWA, SWB Rise Time, I = 2A
120
110
FB VOLTAGE (V)
R
DS(ON)
(mΩ)
1V/DIV
10ns/DIV
3428 G07
U W
2V/DIV
100mV/DIV
500ns/DIV
3428 G02
100µs/DIV
3428 G03
Converter Efficiency
108
3.3V TO 5V
106
104
2.5V TO 3.3V
102
100
98
96
94
92
90
0.1
LOAD CURRENT (A)
3428 G05
Switch R
DS(ON)
vs V
OUT
1
2
88
2.5
3.0
4.0
4.5
3.5
OUTPUT VOLTAGE (V)
5.0
3428 G06
Switch R
DS(ON)
vs Temperature
1.27
Feedback Voltage vs Temperature
1.26
100
90
80
70
60
–45 –25 –5
1.25
1.24
1.23
15 35 55 75
TEMPERATURE (°C)
95 115
3428 G08
1.22
–45 –25
–5
15 35
55 75
TEMPERATURE (°C)
95 115
3428 G09
3428f
3
LTC3428
TYPICAL PERFOR A CE CHARACTERISTICS
Peak Current Limit vs
Temperature
3.4
3.2
PEAK CURRENT LIMIT (A)
PI FU CTIO S
PGNDA, PGNDB (Pins 1, 10, 11 (Exposed Pad)):
Power
Ground for the IC. Tie directly to local ground plane.
SWB (Pin 2), SWA (Pin 9):
Phase B and Phase A Switch
Pins. The inductor and Schottky diodes for each phase are
connected to these pins. Minimize trace length to reduce
EMI.
V
OUT
(Pin 3):
Power Supply Output and Bootstrapped
Power Source for the IC. Connect low ESR output filter
capacitors from this pin to the ground plane.
SHDN (Pin 4):
Shutdown Pin. Grounding this pin shuts
down the IC. Connect to a voltage greater than 1.5V to
enable.
V
C
(Pin 5):
Error Amp Output. A frequency compensation
network is connected to this pin to compensate the boost
converter loop.
FB (Pin 6):
Feedback Pin. A resistor divider from V
OUT
is
connected here to set the output voltage according to
V
OUT
= 1.243 • (1 + R1 / R2)
AGND (Pin 7):
Signal Ground for the IC. Connect to ground
plane near feedback resistor divider.
V
IN
(Pin 8):
Input Supply Pin. Bypass V
IN
with a low ESR
ceramic capacitor of at least 4.7µF. X5R and X7R dielec-
trics are preferred for their superior voltage and tempera-
ture characteristics.
4
U W
3.0
2.8
2.6
2.4
2.2
2.0
–45
–25
35
15
55
–5
TEMPERATURE (°C)
75
95
3428 G10
U
U
U
3428f
LTC3428
BLOCK DIAGRA
W
FB
ERROR AMPLIFIER/SOFT-START
V
IN
V
C
FB
–
+
1.243V
V
OUT
CURRENT
LIMIT
I
SENB
SWB
I
SENB
RAMP/
SLOPE COMP
CLK B
–
–
+
PWM
COMP
PWM
LOGIC
DRIVER
PGNDB
CHANNEL B
OSCILLATOR
CHANNEL A
CLK A
TSD
SWA
RAMP/
SLOPE COMP
I
SENA
SHDN
V
C
AGND
5pF
SHUTDOWN
CURRENT
LIMIT
I
SENA
3428 BD
+
–
–
PWM
LOGIC
PWM
COMP
DRIVER
PGNDA
3428f
5