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IDT74FCT273ATPY8

Description
D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SSOP-20
Categorylogic    logic   
File Size72KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT74FCT273ATPY8 Overview

D Flip-Flop, FCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SSOP-20

IDT74FCT273ATPY8 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionSSOP-20
Contacts20
Reach Compliance Codenot_compliant
seriesFCT
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length7.2 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Sup83300000 Hz
MaximumI(ol)0.048 A
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)240
power supply5 V
Prop。Delay @ Nom-Sup7.2 ns
propagation delay (tpd)7.2 ns
Certification statusNot Qualified
Maximum seat height2 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typePOSITIVE EDGE
width5.3 mm
Base Number Matches1
IDT54/74FCT273T/AT/CT
FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
OCTAL D FLIP-FLOP
WITH MASTER RESET
FEATURES:
IDT54/74FCT273T/AT/CT
DESCRIPTION:
Std., A, and C grades
Low input and output leakage
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, SSOP, QSOP
– Military: CERDIP, LCC
The FCT273T is an octal D flip-flop built using an advanced dual metal
CMOS technology. The FCT273T has eight edge-triggered D-type flip-
flops with individual D inputs and O outputs. The common buffered Clock
(CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one set-
up time before the low-to-high clock transition, is transferred to the corre-
sponding flip-flop’s O output.
All outputs will be forced low independently of Clock or Data inputs by
a low voltage level on the
MR
input. The device is useful for applications
where the true output only is required and the Clock and Master Reset are
common to all storage elements.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
CP
R
D
MR
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-2568/2
© 2002 Integrated Device Technology, Inc.
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