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  • Duration:43 minutes and 23 seconds
  • Date:2020/08/23
  • Uploader:桂花蒸
Introduction
keywords: FPGA ASIC Verilog
Verilog HDL digital integrated circuit design principles and applications Cai Jueping and He Xiaochuan lectured by Cai Jueping and Li Zhenrong of Xi'an University of Electronic Science and Technology
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