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CN0144

Using LO two-way modulator to build a wideband low-EVM direct conversion transmitter

 
Overview

Circuit functions and advantages

This circuit is a complete implementation of the analog part of a broadband direct conversion transmitter (analog baseband input, RF output). This circuit supports RF frequencies from 68.75 MHz to 2.2 GHz through the use of a phase-locked loop (PLL) and a wideband integrated voltage-controlled oscillator (VCO). Unlike modulators that use a divide-by-1 LO stage (as described in CN-0134 ), this circuit does not require harmonic filtering of the LO. For best performance, only the LO input of the modulator is required to be driven differentially. The ADF4350 provides differential RF outputs, making it ideal for this modulator. Low-noise LDOs ensure that the power management scheme has no adverse impact on phase noise and error vector magnitude (EVM). This combination of devices provides industry-leading direct conversion transmitter performance from 68.75 MHz to 2.2 GHz. For frequencies above 2.2 GHz, it is recommended to use the divide-by-1 modulator introduced in CN-0134.

Figure 1. Direct conversion transmitter (schematic diagram: decoupling and all connections not shown)

 

Circuit description

The circuit shown in Figure 1 uses a fully integrated fractional-N PLL ADF4350 and a wideband transmit modulator ADL5385 . The ADF4350 provides the local oscillator (LO frequency is 2 times the modulator RF output frequency) signal to the transmit quadrature modulator ADL5385, which upconverts the analog I/Q signal to an RF signal. Together, the two devices provide a wideband baseband I/Q to RF transmit solution. The ADF4350 is powered by an ultralow noise 3.3 V ADP150 regulator for optimal LO phase noise performance. The ADL5385 is powered by a 5 V ADP3334 LDO. The ADP150 LDO's output voltage noise is only 9 μV rms (integrated from 10 Hz to 100 kHz), helping to optimize VCO phase noise and reduce the impact of VCO pushing (equivalent to supply rejection). For more information on the CN-0147, see Powering the ADF4350 with an ADP150 LDO.

The ADL5385 uses a divide-by-2 module to generate quadrature LO signals. Therefore, quadrature accuracy depends on the duty cycle accuracy of the input LO signal (and the matching of the internal divider flip-flop). Any imbalance in rise and fall times will cause even order harmonics to appear and show up on the ADF4350 RF output. When driving the modulator LO input differentially, even harmonics can be eliminated, thereby improving the overall quadrature generation. (See "Wideband A/D Converter Front-End Design Considerations: When to Use a Double Transformer Configuration." Rob Reeder and Ramya Ramachandran. Analog Dialogue , 40-07)

Sideband suppression performance depends on the quadrature accuracy of the modulator, so driving the LO input differentially can achieve better sideband suppression performance than single-ended mode. The ADF4350 provides a differential RF output, while most competing PLL devices with integrated VCOs provide single-ended outputs.

The ADF4350 output matching includes the Z BIAS pull-up resistor, and the decoupling capacitor of the power node also plays a role. To achieve broadband matching, it is recommended to use a resistive load (Z BIAS = 50 Ω) or to connect a resistive load in parallel with the reactive load of ZBIAS. The latter provides slightly higher output power, depending on the inductor chosen. For LO operating frequencies below 1 GHz, an inductor value of 19 nH or higher should be used. Measurements for this circuit were obtained using an output power setting of Z BIAS = 50 Ω and +5 dBm. This setup results in each output providing approximately 0 dBm across the entire frequency band, or +3 dBm differential, using 50 Ω resistors. The ADL5385 LO input drive level is rated from −10 dBm to +5 dBm, so the ADF4350 output power can be reduced to save current.

Figure 2. Sideband suppression, RFOUT swept from 68.75 MHz to 2200 MHz

 

The relationship between sideband suppression sweep frequency and RF output frequency is shown in Figure 2. The test conditions for this frequency sweep are as follows: baseband I/Q amplitude = 1.4 V peak-to-peak differential sine wave, quadrature with 500 mV DC bias; baseband I/Q frequency (fBB) = 1 MHz; LO = 2 × RFOUT. The schematic diagram of the test setup is shown in Figure 3. The standard ADL5385 evaluation board does not allow differential LO input drivers, a modified ADL5385 evaluation board can be used.

Figure 3. Sideband suppression measurement test setup (schematic diagram)

 

This circuit achieves equivalent or better sideband suppression performance than driving the ADL5385 with a low-noise RF signal generator (the method used in the data sheet measurement setup). Using the differential RF output of the ADF4350 eliminates even-order harmonics and improves modulator quadrature accuracy, which affects sideband suppression performance and EVM (error vector magnitude). Measurements using the circuit shown in Figure 1 show that the single-carrier W-CDMA composite EVM is better than 2%. Therefore, it provides a low-EVM broadband solution for frequencies in the 68.75 MHz to 2.2 GHz range. For frequencies above 2.2 GHz, the divide-by-1 modulator module described in CN-0134 should be used.

For the complete design support package for this circuit note, please visit http://www.analog.com/CN0144-DesignSupport .

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Update:2025-05-07 02:43:57

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