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CN0155

Implement precision electronic scale design using the 24-bit Σ-Δ ADC AD7195 with built-in PGA and AC excitation

 
Overview

Circuit functions and advantages

This circuit is an AC excitation electronic scale system built using AD7195 . The AD7195 is an ultra-low noise, low drift 24-bit Σ-Δ ADC with built-in PGA and driver to implement AC excitation of the load cell. The device simplifies scale design by placing most of the system building blocks on-chip. The AD7195 maintains good performance over the full output data rate range of 4.7 Hz to 4.8 kHz and can be used in scale systems operating at lower speeds as well as in higher speed scale systems.

Figure 1. Scale system using AD7195 with built-in AC excitation (simplified schematic, not all connections shown)

 

Circuit description

With AC excitation, an external MOSFET can be used to switch the polarity of the load cell's excitation voltage. Adjacent values ​​are then averaged to eliminate DC induced bias. The AD7195 contains internal logic to control the switching of external MOSFETs. The drive signals from the AD7195 are precisely timed and non-overlapping, ensuring that no short circuits occur when switching the polarity of the bridge drive voltage. Pull-up and pull-down resistors of 1 MΩ are connected to ACX2 and ACX2 to prevent short circuits at power-up.

The AD7195 provides an integrated AC-energized load cell solution. The AD7195 accepts a reverse reference voltage, which is required when the load cell's excitation voltage is reversed. The AD7195 synchronizes the AC stimulus with the conversion and then averages it. Only few external components are needed. In addition to MOSFET transistors, electromagnetic shielding (EMC) requirements can be met by simply using some filters on the analog input and configuring some external components such as capacitors on the reference voltage pin.

The low-level signal from the load cell is amplified by the AD7195's built-in PGA. The PGA is programmed to operate at a gain of 128. The conversion result of AD7195 is sent to PC through USB interface. The conversion results can be converted into weight and displayed using Labview software.

Figure 2 shows the actual test setup. For optimal system performance, this test setup uses a 6-wire load cell. In addition to the excitation, ground and 2 output connections, the 6-wire load cell has 2 sense pins. These sense pins are connected to the high and low sides of the Wheatstone bridge respectively. Therefore, the voltage developed across the bridge can be accurately measured despite the voltage drop caused by the line resistance. Additionally, the AD7195 has differential analog inputs that accept differential reference voltages. The load cell differential SENSE line is connected to the AD7195 reference voltage input to form a ratiometric configuration that is not affected by low-frequency changes in the power supply excitation voltage and does not require a precision reference voltage source. If a 4-wire load cell is used, there is no sense pin and the ADC reference voltage pin will be connected to the excitation pins EXC + and EXC -. In this configuration, there will be a voltage drop between the EXC +/EXC – pins and the SENSE+/SENSE- due to the line resistance, so the system is not fully ratiometric.

Figure 2. Electronic scale system setup using AD7195

 

The AD7195 has separate analog power supply pins and digital power supply pins. The analog part must be powered by a 5 V power supply. The digital power supply is independent of the analog power supply and can power any voltage from 2.7 V to 5.25 V.

The microcontroller runs on 3.3 V power supply. Therefore, DVDD is also powered by 3.3 V power supply. This eliminates the need for external level translation, simplifying the interface between the ADC and microcontroller.

There are several ways to power this scale system, such as from mains power or from a battery (as shown in Figure 1). A 5 V low noise regulator is used to ensure low noise power to the AD7195 and load cell. The ADP3303 (5 V) is a low noise regulator used to generate 5 V supplies. The filter network shown in the dotted box is used to ensure that the system obtains low noise AVDD. Additionally, a noise reduction capacitor is provided at the regulator output as recommended in the ADP3303 (5 V) data sheet. To optimize electromagnetic shielding performance, the regulator output is filtered before powering the AD7195 and load cell. The 3.3 V digital supply can be generated using the ADP3303 (3.3 V) regulator. Because any noise on the power supply or ground plane will introduce noise into the system and degrade circuit performance, a low-noise regulator must be used to generate all power to the AD7195 and load cells.

If a 2 kg load cell with a sensitivity of 2 mV/V is used, then with an excitation voltage of 5 V, the full-scale signal from the load cell is 10 mV. Load cells have an associated offset voltage, or TARE. The amplitude of this TARE can be up to 50% of the load cell's full-scale output signal. Load cells also have a gain error of up to ±20% of full scale. Some customers utilize DAC to eliminate or offset TARE. If the AD7195 uses a 5 V reference, its analog input range is equal to ±40mV when the gain is set to 128 and the device is configured for bipolar operation. The AD7195's wide analog input range relative to the load cell's full-scale signal (10 mV) helps ensure that the load cell's offset voltage and gain errors do not overload the ADC front end.

When the first-order filter notch is set to 4.7Hz, the AD7195 has an rms noise of 6 nV and a peak-to-peak noise of 40 nV. When using AC excitation (sinc 4 filter selected), this corresponds to an output data rate of 1.17 Hz. The number of noise-free samples is equal to

CN0155_equation1

In actual operation, the load cell itself will introduce a certain amount of noise. Figure 3 shows the output performance measured by placing a 1 kg weight on the load cell and collecting 500 conversions. The system noise calculated by the software is 10nV (rms) and 51nV (peak-to-peak), which is equivalent to 196,000 noise-free numbers or 17.5 bits of noise-free resolution (calculated from the measured peak-to-peak noise).

Figure 3. Output code measured with 500 samples, showing the impact of noise

 

Figure 4 shows the performance in terms of weight. Relative to 500 codes, the peak-to-peak variation of the output is 0.01 grams. Therefore, the accuracy of this electronic scale system reaches 0.01 grams.

Figure 4. Measured output (in grams) over 500 samples, illustrating the impact of noise.

 

Shown above is the actual (raw) conversion result read back from the AD7195 after connecting the load cell. In actual operation, electronic scale systems will use digital post-filters. Performing additional averaging in the post-filter further increases the number of noise-free samples, but at a reduced data rate.

As with other high-precision circuits, proper layout, grounding, and decoupling techniques must be used. For more information, please refer to Tutorial MT-031, "Implementing Data Converter Grounding and Solving the Mysteries of AGND and DGND ," and Tutorial MT-101, "Decoupling Techniques."

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