aerobotics

CN0193

A high-voltage (30 V) DAC powered by a low-voltage (3 V) supply generates the tuning signal for the antenna and filter

 
Overview

Circuit functions and advantages

The circuit shown in Figure 1 generates a high-voltage signal that controls the capacitance of a BST (barium strontium titanate) capacitor. The BST capacitance can be changed simply by applying voltages between 0 V and 30 V to the correct terminals. In this way, the dielectric thickness changes and therefore the capacitance changes. BST is commonly used in tunable antenna arrays and tunable filters. There are clear advantages especially for these tuning applications, such as compensation of component tolerance errors, fine tuning of filter cutoff frequencies or network impedance matching for tunable antennas.

Such applications require a convenient, compact, low-cost circuit to generate high-voltage power, and it is often not practical to add a separate power supply just for this function. The circuit in Figure 1 meets these requirements using an ADP1613 boost converter and an AD5504 30 V/60 V DAC. The total board area of ​​the boost regulator circuit is only 43 mm2. The ADP1613 is available in an 8-pin MSOP package, and the AD5504 is available in a 16-pin TSSOP package.

Boost circuits can also be used in LED driver applications and to provide receiver bias voltages in optical communications systems.

Figure 1. Boost supply and high-voltage DAC provide tuning signal to BST capacitor (simplified schematic: not all connections shown)

 

Circuit description

This circuit can operate with a 3 V (V DD ) supply, the BST capacitor requires more than 20 V for full control. The two main circuit modules are the ADP1613 boost switching converter and the AD5504 high-voltage DAC. The circuit diagram is shown in Figure 1.

The ADP1613 is a step-up DC-DC switching converter with an integrated power switch capable of delivering up to 20 V output. Higher output voltages can be achieved using other external components. The ADP1613 features an adjustable soft-start feature that prevents inrush current when the device is enabled. Pin-selectable switching frequency and PWM current mode architecture provide easy noise filtering and excellent transient response. Components connected around the ADP1613 produce a 32 V output from a 3 V input.

The ADIsimPower™ design tool provides designers with an easy way to determine appropriate components based on input and output requirements. The ADP1613 circuit design shown in Figure 1 uses ADIsimPower's "lowest cost" option with a 3 V input voltage, a 32 V output voltage, and a 40 mA load current. The design can be downloaded from www.analog.com/CN0193-PowerDesign .

ADIsimPower design files include a bill of materials, detailed schematics, Bode plots, efficiency curves, transient response, and recommended board layout.

The 32 V output of the ADP1613 is used as the power supply for the AD5504. The AD5504 is a quad-channel, 12-bit DAC capable of providing output voltages up to 60 V. The full-scale output of the AD5504 is determined by the state of the R_SEL pin. In this application, R_SEL is connected to V DD , so a full-scale output of 30 V is selected. The AD5504 is controlled by a 3 V logic compatible serial interface. The DAC output can be changed by writing to the appropriate DAC register through the serial interface. Multiple DACs can be updated simultaneously by pulsing the load DAC ( (LDAC) ) pin low, thus changing all four BST capacitors simultaneously.

Using the circuit shown in Figure 1, DAC output voltages up to 30 V can be generated. The output voltage is used to set the bias voltage of the BST capacitor, thereby adjusting the antenna response. Figure 2 shows the equivalent circuit of the BST capacitor used as an adjustable matching network, and Figure 3 shows the transfer function of the BST capacitor as a function of bias voltage and the resulting antenna response. For more information on BST capacitors, please visit: www.agilerf.com .

Figure 2. BST capacitor equivalent circuit

 

In any circuit where precision is important, power and ground return layout on the circuit board must be carefully considered. The printed circuit board (PCB) containing this circuit should have the analog portion separated from the digital portion. If this circuit contains other devices in the system that require an AGND to DGND connection, the connection can only be made at one point. This ground point should be as close as possible to the AD5504. This circuit should use a multi-layer PCB with larger area ground and power layers. For more discussion on layout and grounding, please refer to tutorial MT-031 .

The power supply to the AD5504 should be bypassed with 10 μF and 0.1 μF capacitors. These capacitors should be as close to the device as possible, preferably directly opposite the device with the 0.1 μF capacitor. The 10 μF capacitor should be a tantalum bead or ceramic type capacitor. The 0.1 μF capacitor must have low equivalent series resistance (ESR) and low equivalent series inductance (ESL), which are typically found in ordinary ceramic capacitors. The 0.1 μF capacitor provides a low-impedance path to ground for high frequencies caused by transient currents caused by internal logic switches. For more information on proper decoupling techniques, please refer to Tutorial MT-101 .

Power traces should be as wide as possible to provide a low impedance path and reduce the effects of glitches on the power lines. Clocks and other fast-switching digital signals should be digitally shielded from other devices on the board.

The ADIsimPower design file provides a recommended layout for the ADP1613 portion of the circuit. The file can be downloaded from www.analog.com/CN0193-PowerDesign. For the complete design support package for this circuit note, see www.analog.com/CN0193-DesignSupport .

Figure 3: Bias voltage versus BST capacitance and resulting antenna response

 

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