The circuit shown in Figure 1 is a true RMS response power detector that uses a variable gain amplifier (VGA) and an RMS response power detector to provide an extremely wide detection range of approximately 95 dB. RMS detectors are useful in many applications, such as receivers and transmitters that require precise measurements of signal power. Since this circuit measures RMS power, it is suitable for use in systems with different crest factors. Examples of such systems are: GSM/EDGE, CDMA, WCDMA, TD-SCDMA and LTE wireless base stations, as well as any system using QAM modulation.

The detection range of the ADL5902 RMS detector is 65 dB, which can be extended to 95 dB by adding a linear AD8368 VGA. The ADL5902TADJ function is used to provide temperature stability of the entire circuit. Place a S AW filter between VGA to reduce noise while increasing sensitivity. This also reduces the frequency range of the circuit and the passband range of the SAW filter.

The 65 dB range of the ADL5902 linear dB true RMS response RF detector can be extended by a separate variable gain amplifier (VGA). The VGA's gain control input is taken directly from the ADL5902VOUT pin. It can expand the dynamic range according to the VGA gain control range (in practical applications, the range expansion obtained is slightly smaller). If the VGA also provides linear dB (exponential) gain control, the total measurement range will remain linearly scaled in dB. The VGA gain must decrease as its gain offset increases in the same manner as the ADL5902. The AD8368 meets all of these conditions. Figure 1 shows the circuit schematic.

The ADL5902RMS computing circuit uses VGA hierarchical architecture. An internal linear dB VGA with negative gain control slope drives the input of a narrow range RMS detector. The output level of this detector is compared to the output of a second setpoint detector through a current balancing architecture; one detector supplies current while the other detector draws current. If the output levels of the two detectors are not equal, then the residual current will charge or discharge the capacitor; the capacitance value is equal to the parallel combination of the internal 26 pF capacitor and the external capacitor on pin 6 (CLPF) of the ADL5902. This configuration causes the VOUT value to rise or fall. Since VOUT is directly connected to the gain control input of the ADL5902 VGA, this will cause the VGA gain to rise or fall until the output levels of the two detectors are equal. At this point, VOUT and VGA gain are established. Since the ADL5902VGA has a linear dB transfer function, the VOUT output voltage is proportional to the logarithm of the RMS value of the input signal.

The detection range of ADL5902 is mainly determined by the gain control range of its internal VGA. Because the input signal decreases as the range increases, the VGA control voltage also decreases until the VGA reaches maximum gain. For rising large input signals, the VGA gain control voltage also rises (and thus the VGA gain decreases) until the minimum gain is reached.

Adding additional variable gain to the signal path extends the circuit's detection range. At this time, the VOUT feedback signal drives the VGA gain control inputs of both the ADL5902 and AD8368. The AD8368MODE pin must be tied low to make the gain control slope negative. Because the AD8368VGA provides gain and attenuation (GMAX = 22 dB, GMIN = −12 dB), it extends both the upper and lower limits of the ADL5902's nominal measurement range. However, to achieve optimal range extension, the voltage driving the gain control pin of the AD8368 must be adjusted correctly.

While the ADL5902RMS detector has a nominal output voltage range of 0 V to 3.5 V, the AD8368VGA requires a 0 V to 1 V control voltage range to fully realize its 34 dB gain control range. Therefore, the VOUT feedback voltage must be scaled down by a factor of 3.5. This is easily accomplished using a resistor divider (R1 and R15 in Figure 1).

Figure 2 shows the transfer function obtained when the input power is swept at 167 MHz. The best linearity is obtained using a 4-point calibration method, with the calibration points being: +15 dBm, −15 dBm, −55 dB and −70 dBm. The 2-point calibration method can also be used, but the linearity will decrease within the input power range.

Note that the AD8368 onboard RF detector and automatic level control (ALC) functionality are not used in this circuit. Therefore, the DETI and DETO pins on the AD8368 can be left open.

RF input power sensitivity

To obtain the excellent sensitivity in Figure 2, a narrowband filter must be placed between the VGA and detector, as shown in Figure 1. Without the filter, the wideband output noise of the AD8368 would overwhelm the low-end sensitivity characteristics of the ADL5902. Figure 3 shows a screenshot of the AD8368 output noise calculation using ADIsimRF . The AD8368VGA has maximum gain when there is a minimum input signal. If the 3 dB bandwidth is 800 MHz and assuming first-order roll-off, then use the 1272 MHz equivalent noise bandwidth (i.e., 800 MHz times 1.57) to calculate the VGA's output noise power. This results in an output noise power level of approximately −51 dBm, which is approximately 10 dB above the nominal input sensitivity of the ADL5902. Therefore, in order to achieve maximum low-end sensitivity, some degree of filtering is necessary.

Figure 4 shows the same noise calculation after adding an EPCOS B5070 SAW filter with a center frequency of 167 MHz to the circuit. In this calculation, the analysis bandwidth is reduced to the same as the SAW filter bandwidth (18 MHz).

Because the noise bandwidth is significantly reduced and the filter insertion loss is 7.3 dB, the integrated output noise of the VGA/SAW combination drops significantly to −77 dBm, which is much lower than the input sensitivity of the ADL5902RMS detector. This ensures that circuit performance is not limited by noise when the VGA gain is maximum.

temperature stability

The ADL5902 is temperature compensated. Setting the voltage on the TADJ pin (Pin 1) optimizes the detector intercept temperature stability at a specific operating frequency. In the range extension circuit shown in Figure 1, any temperature change in the VGA gain will reduce the overall drift of the circuit by dB (for example, a 1 dB drift in VGA gain temperature will reduce the overall temperature stability by 1 dB). For the AD8368VGA, Figure 5 in the AD8368 data sheet shows that the gain drifts approximately ±0.7 dB with temperature. It should be noted that the intercept point of the VGA transfer function has shifted (that is, the gain drift error is unchanged for all gains). Therefore, the detector and VGA have similar temperature drift characteristics. By adjusting the voltage on the ADL5902 TADJ pin, the combined temperature drift of the detector and VGA can be compensated. For an operating frequency of 167 MHz, it was experimentally determined that a TADJ voltage of 0.2 V provides the best temperature compensation achieved in Figure 2.