Circuit functions and advantages

The circuit in Figure 1 is a complete 18-bit, 5 MSPS, low-power, low-noise, high-precision data acquisition signal chain solution that consumes only 122 mW. References, reference buffers, driver amplifiers and ADCs provide optimized solutions with industry-leading 99 dB SNR and −117 dB THD. Due to its low power consumption and small PCB size, this circuit is suitable for portable applications.

Circuit description

The ADA4897-1 is ideal for driving the AD7960, a high-precision, 18-bit, 5 MSPS SAR ADC . The ADA4897-1 is a low-noise (1 nV/√Hz typical) and low-power (3 mA) rail-to-rail output amplifier with 230 MHz bandwidth, 120 V/μs slew rate, and 0.1% settling time. 45ns.

The input signal to the ADA4897-1 op amp is filtered through an 820Ω/100 pF network with a bandwidth of 2 MHz. Additional filtering for the AD7960 ADC input is provided by a 33Ω/56 pF network with a bandwidth of 86 MHz. The latter filter helps reduce kickback from the AD7960 capacitive DAC input and limits the noise entering the AD7960 input.

The circuit uses +7 V and -2.5 V supplies for the inputs of the ADA4897-1 driver to minimize power consumption and achieve optimal system distortion performance. The ADA4897-1 has a rail-to-rail output stage that can swing to within 150 mV of each supply rail. The extra headroom provided by the +7 V and −2.5 V supplies provides excellent distortion performance.

The AD7960 differential input range is set by an external 5 V or 4.096 V reference. In Figure 1, the 5 V reference voltage source is provided by the ADR4550 . This reference voltage source has high accuracy, low power consumption (950μA maximum operating current), low noise characteristics, a maximum initial error of ±0.02%, and provides excellent temperature stability and Low output noise performance. The AD8031 is used to buffer the common-mode output voltage of an external reference and the AD7960 and is suitable for a variety of applications, from high-bandwidth battery-powered systems to high-speed systems where component density requires lower power consumption. The AD8031 has large capacitive load stability and can drive decoupling capacitors used to minimize voltage spikes caused by transient currents.

The AD7960 digital interface uses low voltage differential signaling (LVDS) to achieve high data transfer rates. The user must apply LVDS CLK+/CLK− signals to the AD7960 to transmit data to the digital host.

The AD7960 is a 5MSPS, 18-bit converter with ±0.8 LSB INL, ±0.5 LSB DNL, ​​100 dB DR, and consumes only 46.5 mW. As shown in Figure 1, the AD7960 operates on +5 V (VDD1) and +1.8 V (VDD2, VIO) power supplies. The required 5 V and 1.8 V supplies can be generated using LDOs such as the ADP7104 and ADP124 .

The AD7960 converts the differential voltage of a pair of inverting analog input signals (IN+ and IN−) into a digital output signal. Analog inputs IN+ and IN− require a common-mode voltage equal to half the reference voltage. The AD8031 low-noise, low-power amplifier buffers the +5V reference voltage from the low-noise, low-drift ADR4550 and also buffers the common-mode output voltage (VCM) of the AD7960. The ADA4897-1 is configured as a unity-gain buffer driving the input of the AD7960 with an opposite-phase differential pair (180° inverted) from 0 V to 5 V. Figure 2 shows typical integral nonlinearity as a function of the AD7960 output code and is within the ±0.8 LSB specification using a 5 V external reference.

Histogram and FFT performance

The histogram in Figure 3 and the FFT curve in Figure 4 show the precision performance of this circuit using a 5 V external reference. The EVAL-AD7960FMCZ evaluation board was used to obtain data, and the Audio Precision SYS-2702 was used as the signal source.

To view the complete schematic and printed circuit board layout, see the CN-0277 Design Support Package: www.analog.com/CN0277-DesignSupport