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CN0376

Channel-to-channel isolated temperature input (thermocouple/RTD) for PLC/DCS applications

 
Overview

Circuit description

The AD7124-4 24-bit Σ-Δ ADC integrates a programmable gain array (PGA) and voltage reference, providing a complete feature set for flexible connection of thermocouples or RTD sensors. Features include an on-chip voltage reference, programmable gain array, excitation current, bias voltage generator, and flexible filtering with enhanced 50 Hz and 60 Hz rejection options. The AD7124-4 is available in a small 5 mm × 5 mm LFCSP package, making it ideal for channel-to-channel isolation designs where space is an important consideration. It also includes several diagnostic features available to the user. The

ADuM5010 isolated DC/DC converter provides 3.3 V isolated power through integrated isoPower® technology . The ADuM1441 is used to isolate the serial peripheral interface (SPI) of the AD7124-4. The AD7124-4 micropower isolator consumes only 4.8 A per channel when idle, making it very energy efficient. The ADP2441 is a 36 V step-down DC-DC regulator that operates from an industry-standard 24 V supply and has wide input voltage tolerance. The ADP2441 is used to reduce the input voltage to 3.3 V to power all controller-side circuitry. System Overview Channel-to-channel isolation is extremely advantageous in automation systems because the failure of a specific input channel does not affect other channels in the system. However, channel-to-channel isolated input modules present significant design challenges in terms of complexity, space constraints, and system cost. Thermocouple or RTD inputs are common inputs in industrial automation systems, so it is useful to design a temperature input module that can handle both. This flexibility minimizes the design effort for both input modules and provides flexibility to module users. The AD7124-4 significantly reduces design complexity, providing a system-on-chip capable of performing all measurement functions required for thermocouples and RTD sensors. The size of each channel of the circuit shown in Figure 1 is only 27 mm × 50 mm. If devices are placed on both sides of the printed circuit board (PCB), the above area can be further reduced. Such a small size is achieved because the AD7124-4 is available in a small 5 mm × 5 mm LFCSP package and integrates almost all required functions except isolation and additional front-end filtering and protection. The isolation circuit for data and power isolation occupies only 87 mm 2 with a minimum combined width of 12.5 mm. Terminal Connections Figure 2 shows the terminal connections for each of the two input channels. These pins correspond to P1 and P2 in hardware (see Figure 1). The thermocouple and 2/3/4 wire RTD connections are shown in the figure.




















Figure 2. Front-end filtering and circuitry (simplified diagram)



Input filtering

As shown in Figure 3, input common mode noise filtering is implemented by R1, C1 and R2, C2, and the cut-off frequency is about 50 kHz. Differential noise filtering is implemented by R1, R2 and C3, with a cutoff frequency of approximately 2.5 kHz. It is especially important to filter out any interference at the Σ-modulator frequency (307 kHz in full power mode). It is recommended to adjust the cutoff frequency of these filters to meet the system bandwidth requirements. The cutoff frequency of the common mode filter is approximately 10 times the cutoff frequency of the differential filter.


Figure 3. Front-end filtering and circuitry (simplified diagram)


Input Protection

To protect the inputs from overvoltage conditions, a 3 kΩ resistor is placed in each input path of the AD7124-4. This resistor value limits the current generated by a 30 V DC overvoltage to less than 10 mA.

Consider the case where the 30 V voltage is connected between AIN+ and AIN−. Looking in from AIN+, the 30 V voltage sees R1 (3 kΩ), followed by the internal ESD protection diode, then the 3 kΩ resistor looking out from AIN3 in parallel with the 3 kΩ resistor looking out from AIN4. Ignoring the internal ESD protection diodes, the total resistance between AIN+ and AIN− is 3 kΩ + 3 kΩ||3 kΩ = 4.5 kΩ. Therefore, the current limit through the AD7124-4 is 30 V ÷ 4.5 kΩ = 6.7 mA.


RTD Input

The circuit shown in Figure 1 can be connected to a 2-wire, 3-wire, or 4-wire RTD. Can measure resistance up to 3.92 kΩ, so it is suitable for Pt100 and Pt1000 RTDs.is a ratiometric measurement betweenthe RTD and a 3.92 kΩ precision reference resistor (R REF ). As shown in Figure 3, the RTD measurement is made between AIN1 and AIN3, with REFIN1+ and REFIN1− used as the reference input for the measurement. The excitation current is set as follows:

  • 2-wire mode: Only excitation on AIN0 is active, set to 250 μA.
  • 3-wire mode: The excitation currents on both AIN0 and AIN4 are active and set to 100 μA each.
  • 4-wire mode: Only the excitation on AIN0 is active, set to 250 μA.

Uses high-end current sensing technology. For lower RTD lead resistance values, this technique reduces the effects of current mismatch in 3-wire mode. For more information on 3-wire RTD configuration, see Circuit Note CN-0383.

The reference resistance (R REF ) is selected to be 3.92 kΩ, supporting Pt1000 RTD measurements up to 850°C (RTD resistance is 3.9048 kΩ at 850°C). The value of R REF must be chosen based on the maximum expected resistance of the RTD. The accuracy of the R REF resistor directly affects the measurement accuracy, therefore, precision, low-drift resistors must be used.

The excitation current must be set to 250 μA in 4-wire mode and 100 μA in 3-wire mode. For 4-wire mode, assume an RTD value of 3.92 kΩ. The excitation current from AIN0 flows through RREF+ RRTD+ RRETURN= 3.92 kΩ+ 3.92 kΩ+ 3 kΩ =10.84 kΩ. Therefore, the voltage at AIN0 is equal to 250 μA × 10.84 kΩ =2.71 V. The AD7124-4 specifies the output compliance voltage at the excitation current output terminal to be AVDD− 0.35 V, which is 3.3 V – 0.35 V = 2.95 V. Because 2.95 V > 2.71 V, a 250 μA excitation current will work fine even for the largest RTD resistance.

For more information on 4-wire RTD configuration, see Circuit Note CN-0381 .

In 3-wire mode, the pin-compensated excitation current from AIN4 also flows through the 3 kΩ return resistor, producing an additional voltage at AIN0: 250 μA × 3 kΩ =0.75 V. Therefore, the total voltage at AIN0 is equal to 2.71 V + 0.75 V = 3.46 V, which violates the margin requirement. Therefore, in 3-wire mode, each excitation current must be reduced to 100 μA to provide sufficient margin.

PGA gain can be used to improve measurement resolution. For Pt100 RTD, it is recommended to use a gain of 8 times (because the Pt100 value is 10 times smaller than the Pt1000 value).

To achieve the required accuracy, the RTD itself must be linearized by the host controller via software, see circuit note CN-0383.


Thermocouple Measurement

As shown in Figure 3, the thermocouple is connected between the AIN+ and AIN− terminals. The AIN4 pin provides a bias voltage of 3.3 V ÷ 2 = 1.65 V for the thermocouple. The thermocouple voltage is measured between AIN1 and AIN3. Because the thermocouple signal is very small, a PGA gain of 32x or 64x is usually recommended.

Cold junction compensation uses a 10 kΩ NTC thermistor. The reference voltage excitation V REF is obtained from REFOUT and is connected in series with a precision low-drift 5.62 k¬ resistor to ground. The NTC resistance value can be calculated using the following equation:

CN0376 Equation

where:
V NTC is the voltage measured between AIN1 and AIN3.
V REF is the reference voltage provided by the AD7124-4REFOUT.

The temperature difference between the terminal board and the NTC temperature sensor will directly affect the temperature reading of the thermocouple input. Therefore, the NTC thermistor must be placed as close as possible to the terminal board to maximize thermal coupling.

To achieve the required accuracy, the thermocouple and NTC must be linearized by the host controller via software, see Circuit Note CN-0384 .


Diagnostics

Provides a variety of system-level diagnostic capabilities, including:

  • Reference voltage detection
  • Input overvoltage/undervoltage detection
  • CRC for SPI communication
  • Memory mapped CRC
  • SPI read/write check

These diagnostic functions provide a high level of coverage of possible faults in the input channels.


Isolation

The data channel is isolated using the ADuM1441 four-channel micropower isolator, which is very energy efficient. The ADuM1441 is available in a small 5 mm × 6.2 mm, 16-pin QSOP package (30 mm 2 ).

The ADuM5010 is a complete isolation development converter that utilizes isoPower technology to provide power isolation to the circuit. The ADuM5010 is available in a small 7.4 mm × 7.5 mm, 20-lead SSOP package (56.25 mm 2 ).

Figure 4 shows the ADuM5010 circuit details. Ferrite beads are used on the secondary side of the power supply to suppress potential electromagnetic interference (EMI) radiation. The ferrite beads (Murata BLM18HK102SN1) are specifically selected for high impedance from 100 MHz to 1 GHz. 10 ¬ µF and 0.1 ¬ µF decoupling capacitors are also used. Both the ferrite bead and capacitor are connected to the ADuM5010 pins with short traces to minimize parasitic inductance and resistance.


Figure 4. isoPower circuit with ferrite beads and decoupling capacitors


Stitching capacitors have been kept to a minimum area because the ferrite beads have significantly reduced radiation. The PCB area between the ADuM5010 power supply, GND pin, and ferrite bead should eliminate any ground plane or traces to minimize capacitive coupling of high-frequency noise into the ground plane. For more information on controlling radiation from isoPower devices, see the AN-0971 application note .

Select the R1 and R2 feedback resistors according to the ADuM5010 data sheet to select the 3.3 V output.


Power consumption per channel

The ADuM5010 is powered by the controller side power supply and has a typical power consumption of 3.3 mA. The ADuM5010 is only 27% efficient at full load, so minimizing field-side current consumption can have a significant impact on the channel's energy efficiency.

The AD7124-4 consumes approximately 994 μA (full power mode, gain = 32, TC bias, diagnostics, and internal reference enabled). The power consumption of the AD7124-4 can be significantly reduced by utilizing the mid-power or low-power modes.

For the ADuM1441, the total field-side power consumption is approximately 7.2 μA when idle and 552 μA when operating at 2 Mbp. If the interface is active 1/8 of the time, the total power consumption of the ADuM1441 is (552 μA × 0.125) + (7.2 μA × 0.875) = 75.3 μA.

When operating in full power mode with a gain of 32, the internal reference and TC bias enabled, the measured power consumption of one input channel is 7.9 mA (from the controller side 3.3 V supply).


Power Supply Circuit

The evaluation board is powered by a 4.5 V to 36 V DC power supply, using an on-board switching regulator to provide 3.3 V power to the system, as shown in Figure 5. The EVAL-SDP-CB1Z System Demonstration Platform (SDP) board provides a regulated 3.3 V voltage for the digital interface.

The ADP2441 includes features such as programmable soft-start, regulated output voltage, switching frequency, and power-good indication. These characteristics are programmed with small external resistors and capacitors. The ADP2441 also includes protection features such as undervoltage lockout (UVLO) with hysteresis, output short-circuit protection, and thermal shutdown.

A 300 kHz switching frequency allows the ADP2441 to achieve maximum efficiency. Due to the very high switching frequency of the ADP2441, it is recommended to use a low core loss, low EMI shielded ferrite core inductor.

In the circuit shown in Figure 5, the switching frequency is set to approximately 300 kHz with a 294 kΩ external resistor. The 22µH inductor value (Coilcraft LPS6235-223MLC) was selected using the downloadable ADP2441 buck regulator design tool . This tool selects the best component values ​​based on the required operating conditions (4.5 V to 36 V input, 3.3 V output, 1 A output current). The 1 A current was chosen to power other circuits on the host controller side if needed.


Figure 5. Power supply circuit (schematic diagram, not all connections shown)

Complete documentation for the EVAL-CN0376-SDPZ circuit evaluation board, including schematics, assembly drawings, layout files, Gerber files, and bill of materials, is available at www.analog.com/CN0376-DesignSupport .


Test results

for thermocouple, 3-wire, and For detailed performance analysis of the 4-wire RTD circuit, see Circuit Note CN-0381, Circuit Note CN-0383, and Circuit Note CN-0384, which provide in-depth analysis and measurement results.

Figure 6 shows the histogram of EVAL-CN0376-SDPZ, using a 25 SPS post filter, AIN+ shorted to AIN−, a gain of 32, and TC bias enabled. The data corresponds to 17.85 bits of noise-free resolution.


Figure 6. Code histogram with AIN+ and AIN- inputs shorted (25 SPS post filter selected, gain = 32, TC bias enabled)
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