The circuit shown in Figure 1 is capable of monitoring bidirectional current from sources with DC voltages up to ±270 V with less than 1% linearity error. The load current passes through a shunt resistor external to the circuit. The shunt resistor value should be chosen so that the shunt voltage is approximately 100 mV at maximum load current. /p>

The AD629 amplifier accurately measures and buffers (G = 1) small differential input voltages and rejects high common-mode voltages up to 270 V.

The dual-channel AD8622 is used to amplify the output of the AD629 by 100 times. The AD8475 funnel amplifier attenuates the signal (G = 0.4), converts it from single-ended to differential form, and performs level conversion to meet the analog input voltage range requirements of the AD7170 Σ-Δ ADC.

Electrical isolation is provided by the ADuM5402 quad-channel isolator . This is not only for protection, but also to isolate downstream circuitry from high common-mode voltages. In addition to isolating the output data, the ADuM5402 digital isolator provides +5.0 V isolated power to the circuit.

AD7170 measurement results are provided as digital codes using a simple two-wire SPI-compatible serial interface.

This combination of devices enables an accurate high-voltage positive and negative rail current sensing solution with low component count, low cost, and low power consumption.

This circuit is designed for a full-scale shunt voltage of 100 mV at the maximum load current I MAX . Therefore, the shunt resistor value is R SHUNT = (500 mV)/(I MAX ).

The AD629 shown in Figure 2 is a difference amplifier with built-in thin film resistors that supports continuous common-mode signals up to ±270 V and provides transient protection up to ±500 V. When REF(+) and REF(−) are connected to ground, the device attenuates the signal at the +IN pin by a factor of 20 and then amplifies the signal with a noise gain of 20, restoring the original amplitude at the output.

At 500 Hz, the AD629A has a minimum common-mode rejection ratio (CMRR) of 77 dB, and the AD629B has a minimum common-mode rejection ratio (CMRR) of 77 dB .

In order to maintain ideal common-mode rejection performance, several important conditions need to be met. First, the device's ability to reject these common-mode signals is determined by the supply voltage, as shown in Figure 3. If dual supplies of sufficient voltage cannot be implemented, common-mode rejection performance will degrade.

Second, the AD629 should be operated in unity gain mode using only internally matched thin film resistors. If external resistors are used to change the gain, the common-mode rejection performance will be degraded due to mismatch errors.

The AD8622 is a CMOS low-power, precision, dual-channel, rail-to-rail output operational amplifier mainly used to amplify target signals.

By cascading two inverting gain stages with a gain of –10, the AD629's 100 mV full-scale output is amplified by a factor of 100, resulting in a 10 V full-scale signal. These values ​​can be positive or negative, depending on the direction of the current flow.

The AD8622's dual supplies allow the input and output signals to swing between above and below ground to measure input current in both directions.

In the last stage of the signal chain before conversion to a digital word, the AD8622 output voltage is conditioned to fit the analog input voltage range of the ADC.

The AD8475 "funnel amplifier" shown in Figure 4 offers two selectable attenuation coefficients (0.4 and 0.8). Additionally, the signal is converted to differential form and the common-mode voltage at the output is determined by the voltage on the VOCM pin. When operating from a single 5 V supply, the analog input voltage range is ±12.5 V (for single-ended input).

As shown in Figure 1, the output common-mode voltage is set to 2.5 V by a resistor divider driven by the 5 V reference output of the ADR435.

The main noise source in this system is the AD629's 15 μV pp output noise in the 0.1 Hz to 10 Hz bandwidth. For a 100 mV full-scale signal, the noise-free code resolution is:

The output noise of the AD8622 is only 0.2 μV pp, which is negligible compared to the AD629. The output noise of the AD8475 is 2.5 μV pp, which is also negligible when the full-scale signal level is 4 V pp.

Note that the supply voltage for the AD7170 is provided by the isolated power output (+5.0 VISO) of the ADuM5402 quad isolator.

The reference voltage for the AD7170 is provided by the ADR435 precision XFET® reference. The ADR435 has an initial accuracy of ±0.12% (Grade A) and a typical temperature coefficient of 2 ppm/°C. The ADR435 has a wide operating range of 7.0 V to 18.0 V and operates from a +15.0 V rail.

Although both the AD7170 VDD and REFIN(+) can operate on 5.0 V supplies, using separate voltage references provides greater accuracy.

The input voltage to the AD7170 ADC is converted to an offset binary code at the output of the ADC. The ADuM5402 provides isolation for the DOUT data output, SCLK input, and PDRST input. Although the isolator is optional, it is recommended to protect downstream digital circuitry from high common-mode voltages that could cause failure.

The code is processed in PC using SDP hardware board and LabVIEW software.

Figure 5 compares the ADC output code recorded by LabVIEW with the ideal code calculated based on the ideal system. The figure shows how this circuit achieves less than 0.5% endpoint linearity error over the entire input voltage range (−100 mV to +100 mV). If desired, software calibration can be used to eliminate offset and gain errors.

PCB layout considerations

In any circuit where precision is important, power and ground return layout on the circuit board must be carefully considered. The PCB should isolate the digital and analog parts as much as possible. This PCB is made of 4-layer boards stacked with large area polygons for the ground layer and power layer. For a detailed discussion of layout and grounding, refer to Tutorial MT-031 ; for information on decoupling techniques, refer to Tutorial MT-101 .

The supplies for the AD7170 and ADuM5402 should be decoupled with 10 μF and 0.1 μF capacitors for proper noise rejection and ripple reduction. These capacitors should be as close as possible to the corresponding device, and the 0.1 μF capacitors should have low ESR values. For all high frequency decoupling, ceramic capacitors are recommended.

The isolation gap between the primary and secondary sides of the ADuM5402 should be carefully considered. The EVAL-CN0240-SDPZ board maximizes this distance by pulling back the polygons or devices on the top layer and aligning them with the pins on the ADuM5402.

Power traces should be as wide as possible to provide a low impedance path and reduce the effects of glitches on the power lines. Clocks and other fast-switching digital signals should be digitally shielded from other devices on the board.

For a complete design support package for this circuit note, including complete schematic and board layout, see www.analog.com/CN0240-DesignSupport .