Scheme 1 : Obtain the DC signal through resistor voltage division, and obtain the DC signal through the voltage follower and the co-directional amplifier. STM32F411 controls AD9833 to generate a sinusoidal signal with adjustable frequency and phase. After following the voltage through a voltage follower, a digital potentiometer is used to divide the voltage. The amplitude of the sinusoidal signal can be controlled by changing the resistance of the digital potentiometer by pressing a button. Input the DC signal and sinusoidal signal into the addition and subtraction circuit respectively, and output the differential signal source.

Scheme 2  STM32F411 controls DDS to generate a sinusoidal signal with adjustable frequency and phase offset. After following the voltage through a voltage follower, a digital potentiometer is used to divide the voltage. The amplitude of the sinusoidal signal can be controlled by changing the resistance of the digital potentiometer by pressing a button. Since the DDS used here can adjust the offset, the DC signal is obtained after low-pass filtering. The DC signal and the sinusoidal signal are input into the addition and subtraction circuits respectively, and a differential signal source with controllable frequency and amplitude can be output.

Scheme 3 low-pass filters the PWM signal to obtain a DC signal, and the DC signal value can be changed by controlling the duty cycle. STM32F411 controls AD9833 to generate a sinusoidal signal with adjustable frequency and phase. After following the voltage through a voltage follower, a digital potentiometer is used to divide the voltage. The amplitude of the sinusoidal signal can be controlled by changing the resistance of the digital potentiometer by pressing a button. By inputting the DC signal and the sinusoidal signal into the addition and subtraction circuit respectively, a differential signal source with controllable frequency and amplitude can be output.  

Except for Option 2 , all of the above three options use AD9833 to generate differential mode signals. However, Option 2 requires fewer DDS chip models that can adjust the offset size, so Option 2 is abandoned first. The method of generating common-mode signals in Scheme 1 is to divide the voltage through digital potentiometers. The common digital potentiometers on the market have a 100- level order. The common-mode signal required by the question is exactly 100- level. Therefore, if you want to use digital potentiometers, When the potentiometer divides the voltage, the voltage at both ends of the potentiometer should change within the range, and the accuracy requirement is relatively large. Moreover, any common mode signal input by the user cannot be generated, so option one is abandoned. Solution 3 uses PWM to realize the function of independently adjusting the DC signal value. Here, PWM can be generated by AD9833 or STM32 . Taking into account factors such as circuit implementation and code implementation, we believe that using STM32 to output PWM wave is the best solution. Option 3 is a better option.

Considering that the digital potentiometer does not accurately divide the resistance, there will be a certain error in the output of the differential mode signal, and there will also be a certain error in the PWM filtering. The above two errors can be eliminated through software, and the measured The parameters corresponding to different outputs are recorded in the MCU . When a specific signal needs to be output, the comparison table is searched to determine the parameter settings, thus ensuring the accuracy of the output as much as possible.

After actual measurement, when the peak-to-peak value of the input signal is 40mV , the output signal will be distorted. Even if the input differential mode signal amplitude is 100mV , the output differential mode signal amplitude will not exceed the op amp's power supply voltage ± 5V . Therefore, we directly pass the differential signal through the subtraction circuit to obtain the amplified differential mode signal. Considering that the actual amplification circuit is not completely ideal, a second-order high-pass filter is used to filter out the DC interference. Then, the voltage is divided by resistors first, and the voltage is adjusted to be within the measurement range of the STM32 ADC before measurement. For differential signal measurement circuits, we have proposed two solutions, namely:

1.    Directly use the ADC to measure the differential signal output, and take the maximum value as the differential signal amplitude.

2.    Pass the differential signal through the peak detection circuit and measure the output of the peak detection circuit.

考虑到STM32F4系列的ADC最大频率为25MHZ，且每次采样应至少经过3次循环，若欲直接测量交流信号的幅值，有可能会错过峰值，测量结果为在3个循环内的均值，也并不准确，且经过3个循环的测量虽然测量速度快，但是可能会出现误差，影响判断。故在此我们选择使用方案二：将差分信号通过峰值检波电路，测量峰值检波电路的输出。

由于传统峰值检波电路有局限性，在对幅值较大的信号进行检波之后很难将存储的电压泄放出去，故增加了一个如图1-1所示的由三级管控制的泄压阀，以实现峰值检波电路的“复位功能”。通过本泄压阀，MCU可以在每次测量前“复位”峰值检波电路，以等待进行下一次检波。

本差分放大电路特性测试仪应能够测量：放大倍数、输入电阻、幅频特性、上限截止频率共4个参数，简单分析其测量方法可以发现，幅频特性的测量即是测量不同输入频率下的放大倍数，上限截止频率的测量即为寻找幅频特性中满足放大倍数为中频放大倍数的 倍的频率，故可以将以上4个参数的测量简化为2个参数的测量，分别为：放大倍数、输入电阻。

对于放大倍数的测量，应首先操作差分信号源输出指定参数的差分信号，后启动泄压阀释放存储的电压，当峰值检波电路中电压释放完毕后关闭泄压阀，等待检波电路输出稳定后测量输出，通过此输出计算出实际放大后的差模信号幅值，并于输入的差模信号幅值相除，得到放大倍数。

测量电路实际放大倍数时，应保证输出的差模信号不会出现失真现象，经实际测量，选择峰峰值为30mV的输入信号进行放大倍数的测量是比较合适的。

由于输入端没有隔直电容，直接在输入端加入电阻会导致放大电路的输入电阻发生变化，为降低这种变化所带来的误差，加入的电阻阻值应合理。通过实际测量得到输入电阻大小在10k左右，故此处我们添加了1k的电阻以进行输入电阻的测量。

忽略电阻的加入对放大电路的影响，测量加入电阻前后放大电路的放大倍数的变化。在加入电阻前，测量出的放大倍数为放大电路实际放大倍数，在加入电阻之后，测量出的放大倍数应出现一定幅度的降低，这是因为实际输入放大电路的信号经过了分压，变为了差分信号源输出的信号的 倍，而实际放大电路的放大倍数应不变。记第一次测量的放大倍数为 ，第二次测量的放大倍数为 ，故可列出下方等式：

通过简单计算便可得到放大电路输入电阻。

STM32F411产生的方波信号经过二阶有源低通滤波器后转化为直流信号，图2-1为二阶有源低通滤波器原理图。

增益 ，故应短接  。

截止频率：

参数选择为R1=R2=2kΩ，R3=1kΩ，C1=2μF，C2=1μF，R4短接。增益 ，故应短接  。

截止频率：

参数选择为R1=R2=2kΩ，R3=1kΩ，C1=2μF，C2=1μF，R4短接。

AD9833产生的带直流偏置的正弦信号经过二阶有源高通滤波器去掉直流偏置，图2-2为二阶有源高通滤波器原理图

增益： ，故应短接  

截止频率：

参数选择为R1=2.2kΩ，R2=1.1kΩ，R3=1kΩ，C1=C2=10uF，R4短接。

The circuit in Figure 2-4 is used to capture the peak value of the input voltage ( IN ). When IN is positive, D1 is reverse biased, D2 is forward biased, and no current flows in feedback resistor R2 . As a result, the output voltage ( OUT ) tracks the input voltage ( IN ), and the external feedback loop drives the input of U1 to a virtual short circuit, at which time U1 quickly charges C1 . Since U2 is configured as a voltage follower, the output voltage tracks the voltage on capacitor C1 . C1 is charged to this voltage by U1 's output current through D2 . R1 is responsible for preventing U1 from exceeding its short-circuit output current and isolating U1 from C1 's capacitance, thus preventing ringing or even oscillation. Therefore, this circuit can maintain the output voltage ( OUT ) as the maximum input voltage.

Parameter selection: R1=100 Ω, R2=1K Ω, C1=10nF , U1 and U2 are NE5532 .

This system consists of 5 parts, as shown in Figure 3-1 , which are data processing system, data input system, display system, differential signal source system, and differential signal detection system.

The data processing system mainly consists of STM32F411 , which is responsible for data processing. The data input system mainly consists of a matrix keyboard, which is responsible for completing the operation of users entering data into the system. The display system is mainly composed of an OLED display screen, which is responsible for displaying the results on the screen. The differential signal source system is responsible for receiving the requirements given by the data processing system and generating corresponding differential signals. The differential signal detection system is responsible for detecting the differential signal output and passing the data to the data processing system.

Figure 3-2 shows the output waveform of the differential signal source when the sinusoidal signal amplitude is 600mV and the PWM duty cycle is 90 ;

Figure 3-3 shows the output waveform of the differential signal source when the sinusoidal signal amplitude is 200mV and the PWM duty cycle is 30 .

Considering that STM32 cannot run in parallel with multiple threads, it will be unable to respond to user keystrokes during testing. Our team designed the program to reduce the single-thread blocking time as much as possible to provide smoother human-computer interaction and a more comfortable UI. interface.

When the differential signal source will continue to output a differential signal, start measuring the amplification factor. First open the pressure relief valve, release the voltage stored in the peak detection circuit, and then close the pressure relief valve. Wait for the output of the detection circuit to stabilize, read the amplified voltage, and divide it by the set parameters to calculate the amplification factor. The specific process is shown in Figure 3-6 :

When measuring the parameters of the differential amplification circuit, you should first adjust the input signal parameters and measure the amplification factor at this time . After the measurement, connect a 1K resistor and measure the amplification factor again . Use and combine the formula given in 1.3.2 to calculate the differential amplification circuit. Actual input resistance.

After completing the above measurements, adjust the input signal frequency to 1000HZ , with a peak-to-peak value of 30mV , and start frequency sweeping with a step size of 1000HZ to draw the amplitude-frequency characteristic curve. When it is found that the amplification factor drops to 0.707 times, the dichotomy method is used to continue to find the upper limit cutoff frequency, that is, the step size is continuously reduced to 1HZ to ensure that the theoretical error of the obtained upper limit cutoff frequency is within 1HZ .

Of course, the above magnification measurements should use the measurement method introduced in 3.4.1 to ensure the accuracy of the measurement.

When testing the differential signal source, directly use wires to connect the two outputs to channels 1 and 2 of the oscilloscope respectively , and use the subtraction operation in the math function of the oscilloscope to observe the differential to single-ended signal , and measure the output differential mode signal amplitude with the cursor. Compare the value with the actual set differential mode signal amplitude to determine whether the output differential mode signal meets the requirements.

Figure 4-1 shows the amplitude of the actual differential mode signal when the output differential mode signal is set to 50mV. At this time, the error is 2mV , which meets the requirements. Using this method to continue measuring, we can conclude that the differential signal source we calculated meets the design requirements.

Use an oscilloscope to measure the actual output of the differential amplifier circuit and the output after passing through the peak detection circuit, as shown in Figure 4-2 .

Extrapolate the output of the peak detection circuit to the actual output, and calculate the error between the two. After multiple calculations, take the average and get: the difference between the output of the peak detection circuit and the actual circuit output is about 2.3mV , which is within the acceptable range.

Use wires to connect the tester and the circuit under test, and conduct the test multiple times. Statistics of the total time taken for a complete measurement are recorded. The measurement results obtained from each measurement are recorded and the variance is calculated. The average system time measured was 23.4s.

It can be seen from the measurement results that the system runs quickly, and the variance of each parameter is small under different measurements. This shows that the system operates stably and the measurement result deviation is small.