[Tianjin University of Technology] Differential amplifier circuit tester + Zhang Hao

This system uses the microcontroller STM32F103RCT6 as the control core and consists of a differential signal generator, a differential large circuit, a same-direction summing operation circuit, an ADC detection circuit, a load resistance and parameter display. Among them, the differential signal is implemented by the AD9959 chip using DDS technology. It has a bandwidth of 200MHz , a minimum step frequency of 1Hz , and uses the serial IO interface SPI . It can output a sine wave of about 500mVPP at maximum , and uses two signal channels to generate a phase difference of 180 °, sine waves with equal amplitudes are the most differential signals. ADC peak detection displays the calculation results through the serial screen, which can display amplification, amplitude-frequency characteristics and other parameters. Users can also set the frequency and step of the signal by touching the screen. The entire system is simple to operate and has a friendly interface.

Two solutions are used to generate differential signals. One is to directly use the DDS module on the market, and the second is to use two 555 timers in the project to generate differential signals with common mode.

1)  Theoretical analysis and calculation of voltage value of PWM control DC signal

PWM is controlled by the internal timer of STM32F103RCT6 . It is known that the output amplitude range is 0~3.3V . Assuming that the output PWM wave duty cycle is D , the voltage of the DC signal generated after passing through the RC low-pass filter is D × 3.3 V , to achieve the range of 0~1V , the corresponding output PWM wave duty cycle is 0~30.3% .

2) Use Multisim software for simulation analysis. Import the simulation model of the S9013 transistor into the software . Through circuit design, after simulation, it can be obtained that the amplification factor of the common-mode signal of the differential amplification circuit given in the question is 0. When the input is 1KHz , 50mVpp In the case of a sine wave differential mode signal, the voltage amplification factor of the amplifier can be simulated to be 78. At the same time, the input resistance can be measured to be 10000000. The upper limit cutoff frequency is 32.563kHz .

Circuit diagram of the differential amplification circuit. Q1 and Q2 are the same S9013 transistors. They have a symmetrical structure in the circuit. The emitters are connected to each other and at the same time connected to the steady current source circuit composed of Q3 . The input of the signal is the base of the transistor, and the output is the collector, so there are two input terminals and two output terminals.

In this circuit, the base of Q3 is a DC potential, which is the potential after the positive and negative power supplies are divided by R4 and R5 . Therefore, as long as the power supply voltage does not change, it is a stable voltage.

The voltage V _BE between the base and emitter of the transistor is constant at about 0.7V . The voltage drop of resistor R3 connected between the emitter of Q3 and the negative power supply is also constant. The current flowing between the collector and emitter of Q3 is also constant. That's for sure. Q3 is a current source that washes a certain collector current, that is, it works as a steady current source.

Through the above analysis, due to the symmetrical structure of the differential amplifier circuit, when the two input terminals input common mode signals, the amplification effects of Q1 and Q3 are the same, so the amplification effect cannot be seen at the output terminal. If the input signal is a differential signal, it can be observed to the amplification effect of the circuit. Therefore, this circuit suppresses the common-mode component in the input signal and amplifies the differential-mode component.

The circuit description of the 555 timer scheme is shown in the schematic diagram.