STLink V2 Isolator

Foreword:
It is not recommended to reproduce without the following instruments! ! ! Otherwise, the debugging phase will not be successful: 50M or more bandwidth oscilloscopes, multimeters, 6-channel 24M sampling or above sampling logic analyzers
provide a bidirectional open-drain interface isolation idea.
 
If you really want to copy: Make sure your STLINK V2 is as follows The bargain shown in the picture: (has been debugged and verified on these two)
The line sequence of the DC3-10Pin interface must be the same as that on the picture, and you cannot mistakenly buy the one above the picture below. In
addition, since this design circuit has certain external circuit parameters Extremely sensitive, I do not guarantee that this design can be applied to your STLINK and microcontroller circuits.
You need to make the following three efforts:
Make sure that your STLINK internal interface circuit is the same as the circuit shown in the attached ST-Link V2 Reverse.pdf, and Update your STLINK firmware to the latest version.
The interface related to debugging on the microcontroller (SWIM SWDIO) cannot be connected to any pull-up and pull-down capacitors.
After the circuit is assembled, perform (annoying) debugging to ensure normal use.
Parameters:
Size: 81*26*15mm (L*W*H)
Weight: (no scale)
Communication rate: 4MHz (SWD) 800K (SWIM) (all are default speeds)
Output low level: 0.5V
Input effective low level: <0.2V
Instructions for use:
Prepare A computer with a USB-A interface, STLINK V2, DC3-10Pin double-ended female cable and the machine, connect them in sequence and use
VOLSET to switch whether the voltage supplied to the PWR is 5V or 3.3V.
RSTMODE is used to select Whether to let STLINK take over the reset of the target board, which is useful when using software that forces the target board to remain in reset state (such as STVP).
The RST button is used to manually reset the target board.
Design process:
This design went through three versions from planning to completion Iteration, all designs are based on the level difference principle (see schematic notes and attachment SLLA417B for details).
The first version uses Π220n30 as the isolation main chip, but because the output low level is too high (0.8V), the signal cannot be STLINK Recognition failed.
Some new bidirectional interface isolation schemes were explored between one and two versions, such as H7TOOL-SWD isolation - Jialichuang EDA open source hardware platform (oshwhub.com), but Mulitisim simulation shows that the circuit of this interlocking principle will Because the delay in transmitting the signal to the opposite side is constantly superimposed, it eventually falls into a self-locking state.
The second version attempts to be compatible with STLINK with different line sequences (as shown in the preface), and also attempts to time-share the two bidirectional channels of SWIM and SWDIO into an isolated channel. This added an analog switch, but it failed because the analog switch brought considerable insertion loss, and the speed level required by SWIM SWDIO was different from the bias current.
The third version gave up compatibility and used a separate isolation transmission scheme, which increased the cost. But it makes the design finally run successfully.
Option production:
Do not use BOM. For component selection, refer directly to the schematic and physical diagrams. Pay attention to the value and packaging.
The isolation power module uses a 4-pin narrow body SIP module. The B0505S
isolation chip uses the CA-IS37xx series. Speed Fast (150Mbps) and low price (the two chips in this design cost 4 yuan in total).
The circuit board can be directly sampled for free
(based on the open source schematic diagram. The actual picture shows the version used for debugging. The public version is modified for debugging. Improved version after all bugs)
First solder the back surface mount components: apply an appropriate amount of solder paste on the back pad, place the components according to the PCB, use an air gun, heating table, etc. to solder
and then solder the front LED, socket, switch and Do not solder the isolated power module to the button
first, use an adjustable CC/CV power supply, set 5V200mA to connect to the pad test of the isolated power module, and ensure that there is no short circuit in the primary and secondary before soldering the isolated power module
for debugging:
(Hey, it’s hell ahead. ) The board bound by the logic analyzer.jpg
Install the STM32CubeProgrammer and STVP, respectively, as the host computer for SWD and SWIM interface debugging. At the same time, prepare one STM32 and STM8 development board and
connect the isolator and STLINK to the computer. Check whether the PWR LED lights up and whether the brightness changes due to switching VOLSET.
Measure whether the primary 5V 3V3 power rail is within the 10% error range
and measure whether the base voltage of the transistor is 0.86V (the base voltage of the transistor on the SWDIO host side is 1.1V)
. Pull the terminal input down to ground (you can use tweezers), measure the low level of the local terminal, measure whether the opposite terminal is pulled low, and whether the low level is around 0.5V (the output low level of the SWDIO host terminal is about 0.7V). This step requires Connect the development board four times to the SWD/SWIM host/device side respectively
 , test whether STVP's Read Current Tab is successful and stable, and test whether CubeProgrammer can successfully connect to Target. If not, you can reduce the CLK rate and try to
debug the waveform and details in detail. See the attachment for the file
(normal reading of SWIM waveforms)
(4MHz rate handshake interface STM32 ST-LINK Utility)
(download program at 4MHz)
Defects and common problems:
The analog component is too high and is extremely sensitive to the parameters of the external circuit. The input buffer will Changing to a high-speed comparator may improve it.
Make sure your DC3 connection line is fully connected.