TLV3501 comparator circuit design: AC coupled single supply comparator

This article briefly introduces the TLV3501 comparator-AC coupled single power supply comparator design scheme for you, and hopes to provide guidance for your design of single power supply comparators.

Sometimes, a single supply comparator is required to detect sine or square waves using AC coupling. This single supply comparator is often required due to the difference in ground potential between the two modules. Whenever AC coupling is involved in a single-supply circuit, negative voltages need to be considered. Too much negative voltage on the comparator can cause the comparator to trigger incorrectly or get stuck at an unpredictable level. To achieve a reliable operating point, appropriate high-pass filtering and DC offset are required. This design will show how to AC couple a wide range of input signal levels and frequencies into a high-speed comparator to generate a robust and accurate clock signal.

AC Coupled Single Supply Comparator Circuit Diagram

Design summary

The design requirements are as follows:

• No input signal -> Comparator output = 0V

•Startup time is less than 1ms

•Power supply voltage: 3.3V, +5% (3.135V to 3.465V)

•Input sources provide:

•Vcc = 3.3V, +5% (3.135V to 3.465V)

•Vcc = 5V, +5%, (4.75V to 5.25V)

•Input signal level:

•VIL = GND+400mV @ Isink = 2mA

•VIH = Vcc-400mV @ Isource = 2mA

•Common mode range: +100mV

•Transmission delay: <5ns

•Duty cycle change from input to output <10%

• Frequency requirements – see Table 1

TLV3501 comparator circuit: AC coupled single supply comparator,

The specific operating principle is as follows:

The "AC-coupled single-supply comparator" circuit design provides a way to ignore module-to-module ground differences and provide a wide range of frequencies and amplitudes into a high-speed comparator, resulting in a robust and accurate clock signal. Please refer to Figure 2. C1 and C2 provide AC coupling of the input signal Vin. R2 and R4 provide a DC offset to the CMP-medium power supply. R1 and R5 provide a small 100mV DC offset to CMP+ approximately half the supply voltage. With no input signal, the DC offset difference between CMP- and CMP+ ensures that Vout is a low level (near zero volts) for the comparator output. The DC offset on each input is used to offset the negative voltages that appear on these inputs due to AC coupling from Vin. R3 divides the AC-coupled input signal into a voltage divider whose amplitude is less than the common-mode voltage of the comparator being used. These input divider resistors, combined with the comparator input capacitance, form an input low-pass filter that attenuates AC-coupled signals entering the comparator. For this reason, in practical applications, it is necessary to keep the value of the resistor as low as possible. The high turn-on cutoff frequency for input signal conditioning can be viewed as a simple CR high pass with C = C1||C2 and R = 1.964k (connected to CMP+ and CMP - through the range resistors, R1, R2, R3, R4, R5 equivalent input resistance visible at the ends of C1 and C2).