Cascade amplifier

A cascade amplifier is a two-stage circuit consisting of a buffer amplifier and a transconductance amplifier. The word "cascade" originates from the word "cathode." This circuit offers many advantages over single-stage amplifiers, including improved input-output isolation, better gain, increased bandwidth, higher input impedance, higher output impedance, improved stability, and higher slew rate. The increased bandwidth is due to the reduction of the Miller effect. Cascade amplifiers are typically constructed using FETs (field-effect transistors) or BJTs (bipolar junction transistors). One stage is typically wired in common-source/common-emitter configuration, while the other stage is wired in common-base/common-emitter configuration.

Miller effect

The Miller effect is essentially the product of drain-source parasitic capacitance and voltage gain. While drain-source parasitic capacitance always reduces bandwidth, the situation worsens exponentially when voltage gain is multiplied. Multiplication of stray capacitance increases the effective input capacitance of the amplifier, and as we know, increasing input capacitance increases the frequency cutoff, which means reduced bandwidth. The Miller effect can be reduced by adding a buffer stage to the amplifier's output current or by adding a buffer stage before the input voltage.

FET cascade amplifier.

 

FET Cascode Amplifier

The circuit diagram above shows a typical cascode FET amplifier. The circuit's input stage is a FET common-source amplifier with the input voltage (Vin) applied to its gate. The output stage is a FET common-gate amplifier input stage driver. The output voltage (Vout) is derived from the drain of Q2. Because Q2's gate is grounded, the voltage across Q2's source and the drain voltage of Q1 are virtually constant. This means that the upper FET Q2 presents a lower input impedance to the lower FET Q1. This reduces the gain of the lower FET Q1 and thus the Miller effect, resulting in increased bandwidth. The reduced gain of the lower FET Q1 does not affect the overall gain because the upper FET Q2 compensates. The upper FET Q2 is affected by the Miller effect because the stray capacitance of the drain-source charges and discharges through the drain resistor and load, affecting the frequency response only at high frequencies (well above the audio range).

In the stacked configuration, the input and output are separated. Q1 has a nearly constant voltage at its drain and source terminals, while Q2 has a nearly constant voltage at its source and gate terminals, with almost no input feeding the output. The only point of importance regarding voltage is that the input and output terminals are separated by a constant voltage at the central connection.

Practical cascade amplifier circuit.

 

Practical cascade amplifier circuit

A practical cascade amplifier circuit based on FETs is shown above. Resistors R4 and R5 form a voltage divider bias network for FET Q2. R3 is Q2's drain resistor and limits leakage current. R2 is Q1's source resistor, and C1 is the pass capacitor. R1 ensures zero voltage at Q1's gate and a zero-signal condition.