Order this document by MC3456/D
Dual Timing Circuit
The MC3456 dual timing circuit is a highly stable controller capable of
producing accurate time delays, or oscillation. Additional terminals are
provided for triggering or resetting if desired. In the time delay mode of
operation, the time is precisely controlled by one external resistor and
capacitor per timer. For astable operation as an oscillator, the free running
frequency and the duty cycle are both accurately controlled with two external
resistors and one capacitor per timer. The circuit may be triggered and reset
on falling waveforms, and the output structure can source or sink up to
200 mA or drive MTTL circuits.
•
Direct Replacement for NE556/SE556 Timers
MC3456
DUAL TIMING CIRCUIT
SEMICONDUCTOR
TECHNICAL DATA
•
•
•
•
•
•
•
•
Timing from Microseconds through Hours
Operates in Both Astable and Monostable Modes
Adjustable Duty Cycle
High Current Output can Source or Sink 200 mA
Output can Drive MTTL
Temperature Stability of 0.005% per
°C
Normally “On” or Normally “Off” Output
Dual Version of the Popular MC1455 Timer
P SUFFIX
PLASTIC PACKAGE
CASE 646
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–14)
PIN CONNECTIONS
Discharge A
Threshold A
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
Discharge B
Threshold B
Control B
Reset B
Output B
Trigger B
Figure 1. 22 Second Solid State Time Delay Relay Circuit
1.0 k
MT2
3
10 k
5
0.01
µF
4
2
8
1/2
MC3456
1
6
7
1.0
µF
C
–10 V
t = 1.1; R and C = 22 sec
Time delay (t) is variable by
changing R and C (see Figure 16).
1N4740
3.5 k
250 V
1N4003
–
10
µF
+
R
20 M
G
MT1
Load
117 Vac/60 Hz
Control A
Reset A
Output A
Trigger A
Gnd
0.1
µF
(Top View)
ORDERING INFORMATION
Device
MC3456P
Operating
Temperature Range
0° to +70°C
Package
Plastic DIP
SO–14
Figure 3. General Test Circuit
VR
Reset
5
Control
Voltage
3
Output
VO
ISink
ISource
Gnd
1
2
6 (8)
4
8
VCC 7
Discharge
Threshold
6
Trigger
Ith
2.0 k
VS
2 (12)
Threshold
3 (11)
Control Voltage
ICC
700
VCC
NE556D
Figure 2. Block Diagram
(1/2 Shown)
VCC
14
5k
+
Comp
A
–
5k
+
Comp
–B
5k
7
Gnd
4 (10)
Reset
Flip
R Flop
Q
S Inhibit/
Reset
5 (9)
Output
1 (13)
Discharge
+
0.01
µF
1/2
MC3456
Trigger
Test circuit for measuring DC parameters (to set output and measure parameters):
a) When VS
2/3 VCC, VO is low.
b) When VS 1/3 VCC, VO is high.
c) When VO is low, Pin 7 sinks current. To test for Reset, set VO high,
c)
apply Reset voltage, and test for current flowing into Pin 7. When Reset
c)
is not in use, it should be tied to VCC.
w
v
©
Motorola, Inc. 1996
Rev 2
MOTOROLA ANALOG IC DEVICE DATA
1
MC3456
MAXIMUM RATINGS
(TA = +25°C, unless otherwise noted.)
Rating
Power Supply Voltage
Discharge Current
Power Dissipation (Package Limitation)
P Suffix, Plastic Package, Case 646
Derate above TA = +25°C
D Suffix, Plastic Package, Case 751
Derate above TA = +25°C
Operating Ambient Temperature Range
Storage Temperature Range
Symbol
VCC
Idis
PD
625
5.0
1.0
8.0
TA
Tstg
mW
mW/°C
W
mW/°C
°C
°C
Value
+18
200
Unit
Vdc
mA
0 to +70
–65 to +150
ELECTRICAL CHARACTERISTICS
(TA = +25°C, VCC = +15 V, unless otherwise noted.)
Characteristics
Supply Voltage
Supply Current
VCC = 5.0 V, RL =
∞
VCC = 15 V, RL =
∞
Low State, (Note 1)
Timing Error (Note 2)
Monostable Mode (RA = 2.0 kΩ; C = 0.1
µF)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Astable Mode (RA = RB = 2.0 kΩ to 100 kΩ; C = 0.01
µF)
Initial Accuracy
Drift with Temperature
Drift with Supply Voltage
Threshold Voltage
Trigger Voltage
VCC = 15 V
VCC = 5.0 V
Trigger Current
Reset Voltage
Reset Current
Threshold Current (Note 3)
Control Voltage Level
VCC = 15 V
VCC = 5.0 V
Output Voltage Low
(VCC = 15 V)
ISink = 10 mA
ISink = 50 mA
ISink = 100 mA
ISink = 200 mA
(VCC = 5.0 V)
ISink = 5.0 mA
Output Voltage High
(ISource = 200 mA)
VCC = 15 V
(ISource = 100 mA)
VCC = 15 V
VCC = 5.0 V
Toggle Rate RA = 3.3 kΩ, RB = 6.8 kΩ, C = 0.003
µF
(Figure 17, 19)
Discharge Leakage Current
Rise Time of Output
Fall Time of Output
Matching Characteristics Between Sections
Monostable Mode
Initial Timing Accuracy
Timing Drift with Temperature
Drift with Supply Voltage
Vth
VT
–
–
IT
VR
IR
Ith
VCL
9.0
2.6
VOL
V
–
–
–
–
–
VOH
–
12.75
2.75
–
Idis
tOLH
tOHL
–
–
–
–
12.5
13.3
3.3
100
20
100
100
–
–
–
–
100
–
–
kHz
nA
ns
ns
0.1
0.4
2.0
2.5
0.25
0.25
0.75
2.75
–
0.35
V
10
3.33
11
4.0
–
0.4
–
–
5.0
1.67
0.5
0.7
0.1
0.03
–
–
–
1.0
–
0.1
µA
V
mA
µA
V
Symbol
VCC
ICC
–
–
6.0
20
12
30
Min
4.5
Typ
–
Max
16
Unit
V
mA
–
–
–
–
–
–
–
0.75
50
0.1
2.25
150
0.3
2/3
–
–
–
–
–
–
–
%
PPM/°C
%/V
%
PPM/°C
%/V
xVCC
V
–
–
–
1.0
±10
0.2
2.0
–
0.5
%
ppm/°C
%/V
NOTES:
1. Supply current is typically 1.0 mA less for each output which is high.
2. Tested at VCC = 5.0 V and VCC = 15 V.
3. This will determine the maximum value of RA + RB for 15 V operation. The maximum total R = 20 mΩ.
2
MOTOROLA ANALOG IC DEVICE DATA
MC3456
Figure 4. Trigger Pulse Width
150
ICC , SUPPLY CURRENT (mA)
PW, PULSE WIDTH (ns MIN)
125
100
75
50
25
0
0
0.1
0.2
0.3
0.4
VT (min), MINIMUM TRIGGER VOLTAGE (X VCC = Vdc)
0°C
25°C
70°C
10
25°C
8.0
6.0
4.0
2.0
0
5.0
Figure 5. Supply Current
10
VCC, SUPPLY VOLTAGE (Vdc)
15
Figure 7. Low Output Voltage
Figure 6. High Output Voltage
2.0
1.8
1.6
VCC –VOH (Vdc)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.0
2.0
5.0
10
ISource (mA)
20
50
100
0.01
1.0
2.0
5.0
10
ISink (mA)
20
50
100
5.0 V
≤
VCC
≤
15 V
25°C
1.0
VOL, (Vdc)
25°C
10
(@ VCC = 5.0 Vdc)
0.1
Figure 8. Low Output Voltage
(@ VCC = 10 Vdc)
10
10
Figure 9. Low Output Voltage
(@ VCC = 15 Vdc)
1.0
VOL, (Vdc)
25°C
0.1
VOL, (Vdc)
1.0
25°C
0.1
0.01
1.0
2.0
5.0
10
ISink (mA)
20
50
100
0.01
1.0
2.0
5.0
10
ISink (mA)
20
50
100
MOTOROLA ANALOG IC DEVICE DATA
3
MC3456
Figure 10. Delay Time versus Supply Voltage
1.015
t d, DELAY TIME NORMALIZED
1.010
1.005
1.000
0.995
0.990
0.985
0
5.0
10
15
20
VCC, SUPPLY VOLTAGE (Vdc)
t d, DELAY TIME NORMALIZED
1.015
1.010
1.005
1.000
0.995
0.990
0.985
– 75
Figure 11. Delay Time versus Temperature
– 50
– 25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
Figure 12. Propagation Delay
versus Trigger Voltage
300
t pd , PROPAGATION DELAY TIME (ns)
250
200
150
100
70°C
50
0
0
0.1
0.2
0.3
VT (min), MINIMUM TRIGGER VOLTAGE (x VCC = Vdc)
0.4
0°C
25°C
4
MOTOROLA ANALOG IC DEVICE DATA
MC3456
Figure 13. 1/2 Representative Circuit Schematic
Control Voltage
Threshold
Comparator
VCC
4.7 k
830
4.7 k
1.0 k
6.8 k
Trigger
Comparator
Flip–Flop
Output
5.0 k
Threshold
7.0 k
10 k
c
5.0 k
Trigger
Reset
Reset
Discharge
Gnd
100 k
Discharge
100
5.0 k
220
4.7 k
cb
e
4.7 k
b
3.9 k
Output
GENERAL OPERATION
The MC3456 is a dual timing circuit which uses as its
timing elements an external resistor/capacitor network. It can
be used in both the monostable (one shot) and astable
modes with frequency and duty cycle, controlled by the
capacitor and resistor values. While the timing is dependent
upon the external passive components, the monolithic circuit
provides the starting circuit, voltage comparison and other
functions needed for a complete timing circuit. Internal to the
integrated circuit are two comparators, one for the input
signal and the other for capacitor voltage; also a flip–flop and
digital output are included. The comparator reference
voltages are always a fixed ratio of the supply voltage thus
providing output timing independent of supply voltage.
Monostable Mode
In the monostable mode, a capacitor and a single resistor
are used for the timing network. Both the threshold terminal
and the discharge transistor terminal are connected together
in this mode (refer to circuit Figure 15). When the input
voltage to the trigger comparator falls below 1/3 VCC the
comparator output triggers the flip–flop so that it’s output sets
low. This turns the capacitor discharge transistor “off” and
drives the digital output to the high state. This condition
allows the capacitor to charge at an exponential rate which is
set by the RC time constant. When the capacitor voltage
reaches 2/3 VCC the threshold comparator resets the
flip–flop. This action discharges the timing capacitor and
returns the digital output to the low state. Once the flip–flop
has been triggered by an input signal, it cannot be retriggered
until the present timing period has been completed. The time
that the output is high is given by the equation t = 1.1 RA C.
Various combinations of R and C and their associated times
are shown in Figure 14. The trigger pulse width must be less
than the timing period.
A reset pin is provided to discharge the capacitor thus
interrupting the timing cycle. As long as the reset pin is low,
the capacitor discharge transistor is turned “on” and prevents
the capacitor from charging. While the reset voltage is
applied the digital output will remain the same. The reset pin
should be tied to the supply voltage when not in use.
Figure 14. Time Delay
100
10
C, CAPACITANCE (
µ
F)
1.0
0.1
0.01
0.001
10
µs
100
µs
1.0 ms
10 ms 100 ms
td, TIME DELAY (s)
1.0
10
100
MOTOROLA ANALOG IC DEVICE DATA
5
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