AND8031/D
Isolated Precision
Regulation of a Single
1.8 Volt Output from a
Universal Line Input
Prepared by: Jason Hansen
ON Semiconductor
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APPLICATION NOTE
Generic Off–Line Conversion Circuit
INTRODUCTION
The following Application Note describes an off–line
switching power supply utilizing a precision programmable
reference to regulate a 1.8 volt output. The center of the app
note is the MC33363B, a monolithic SMPS controller with
a 700 volt power switch, and the NCP100, a sub–one volt
precision programmable reference. The system design and
analysis will be described in detail.
The design requirements are for a universal off–line
converter with a 1.8 volt, 1.0 ampere single output with less
than 50 millivolts ripple and operates at 100 kHz. Most of the
components selected are surface mount. This design is
separated into the generic circuit of the off–line converter
and the feedback network.
D1
R1
4.7
Universal
Input
C1
1n
R2
4.7
R4
3.9 k
4.7
µ
400 V
C6
10
µ
C5
47 p
To reduce the total number of components and thus
minimize circuit board area, an SMPS controller with an
integrated power switch is selected. With the low output
power requirement, the MC33363B is selected as the control
and power switch IC. The MC33363B contains an externally
programmable frequency and current limit, internal startup
circuit and can handle up to 8 watts of output power.
The basic off–line conversion circuit is illustrated in
Figure 1. The line input is filtered through the EMC circuit
then rectified and filtered. The rectified voltage is converted
to a lower voltage via the transformer and the MC33363B.
The secondary of the transformer is rectified to a DC voltage
and filtered. The output voltage controls the duty cycle of the
switcher via the isolated feedback network. The calculated
values are a starting point and do not replace bench testing.
U2 CTX22–14966
D5
MURS160
D7
MBRD835L
+
C7
820
µ
D6
MURS120
R12
120
R9
12 k
C8
820
µ
C12
1
µ
1.8 V
–
D2
D3
D4
1N4005
1
3
4
5
R3 30 k
6
C3 390 p
7
C4 1
µ
8
U1
16
Q1
BC858ALT1
C10
1
µ
R11
10
C9
0.1
µ
13
12
11
10
9
R6
2.7 k
U4
NCP100
R10
7.5 k
U3
SFH615–4
MC33363B
Figure 1. MC33363B Basic Flyback Circuit Schematic
©
Semiconductor Components Industries, LLC, 2000
1
October, 2000 – Rev. 1
Publication Order Number:
AND8031/D
AND8031/D
Since the power level is low, an RC EMC filter is utilized.
The RC filter is not as efficient as an LC, but it uses less
board area and will cost less. 1N4005 600 volt fast diodes
provide the full wave rectification of the AC input. The bulk
capacitor is the filter. The selection of the capacitor is
determined from three factors: input voltage, ripple current
and maximum output ripple. The equations for each are as
follows.
Vdc
+
Vac · 2
Irms
+
Ipk2 · D
3
(Discontinuous
mode only)
Psec
+
(Vout
)
Vdiode) · Iout
Pin
+
Lpri
+
1
2
(eq. 5)
(eq. 6)
(Vdc · Ton)2
, or
Lpri · T
(Vdc · Ton)2
Pin · T
2·P· T
L
1
2
(eq. 7)
(eq. 8)
Ipeak
+
(eq. 1)
(eq. 2)
Lpri
Np 2
+
Lsec
Ns
(eq. 9)
k · Pin (AV)
Cin
+
f · (Vripple (p–p))2
Pin
+
Pout
h
(eq. 3)
(eq. 4)
Where k is 1 for AC inputs the peak to peak ripple is 6.0
volts and
η
is estimated to be 70% with the low power level
of the board and the RC input filter. Solving for the equations
above and using 50% for the maximum duty cycle, Vdc
maximum is 375 volts, Vdc minimum is 120 volts, Ipeak and
Irms are solved for in the transformer calculations, Pin is 3.2
watts, and Cbulk is 0.9 uF.
(1)
The transformer converts the rectified line voltage to the
output voltage and is controlled by the MC33363B. To
design the transformer, the following data is necessary. Vdc
minimum is 100 volts (allowing for bulk voltage ripple and
power switch voltage drop), the frequency is 100 kHz, the
maximum duty cycle of the power switch and the reset time
for the secondary are both 45% to maintain discontinuous
conduction, and the secondary diode forward voltage drop
is 0.45 volts (estimated).
For the primary side of the transformer, Lpri is 3.16 mH,
Ipeak is 142 milliamperes, ton is 4.5 usec and Irms is 55
milliamperes–rms. For the secondary, Psec is 2.25 watts, L
is 2.28 uH, Ipeak is 4.44 amperes and Irms is 1.72
amperes–rms. The turns ratio is 37.2. The auxiliary winding
is set to 12 volts and 10 milliamperes. Using the secondary
turns ratio, the auxiliary turns ratio is calculated as 6.6 in
reference to the primary.
With the peak primary current and the frequency
determined, the components surrounding the MC33363B
can be selected. Referring to Figures 2 and 3, RT will be set
to 30 k Ohms and CT will be set to 390 pF. The Over Voltage
Protection, pin 11, will not be used. Its main function is for
loss of optocoupler protection. Pin 8, the reference voltage,
requires a 1.0 uF ceramic capacitor for stability. The voltage
compensation and voltage feedback, pins 9 and 10, will be
covered in the feedback section of this document. The Vcc
pin requires a 10 uF capacitor for stability.
f
OSC,
OSCILLATOR FREQUENCY (Hz)
C
T
= 100 pF
500 k
C = 200 pF
T
200 k
C
T
= 500 pF
100 k
50 k
20 k
C
T
= 1.0 nF
C
T
= 2.0 nF
C
T
= 5.0 nF
C = 10 nF
V
CC
= 20 V
T
A
= 25°C
I
PK,
POWER SWITCH PEAK DRAIN
CURRENT (A)
1.0 M
1.0
0.8
0.6
0.4
0.3
0.2
Inductor supply voltage and
inductance value are
adjusted so that I
pk
turn–off
is achieved at 5.0 ms.
10
15
20
30
V
CC
= 20 V
C
T
= 1.0 mF
T
A
= 25°C
0.15
0.1
7.0
10 k
T
7.0
10
15
20
30
50
70
40
50
70
R
T
, TIMING RESISTOR (kΩ)
R
T
, TIMING RESISTOR (kΩ)
Figure 2. Oscillator Frequency
versus Timing Resistor
Figure 3. Power Switch Peak Drain Current
versus Timing Resistor
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AND8031/D
A snubber is required across the primary winding because
of the leakage inductance. An RCD snubber is implemented.
The diode will be an MURS160 ultrafast diode. The resistor
and capacitor are dependent upon the leakage inductance of
the primary windings of the transformer. Preliminary values
of the resistor and capacitor are derived from the following
equations. The final values will be determined on the bench
with an examination of the trade–offs between system
efficiency and peak voltage.
Vreflect
+
(Vout
)
Vdiode) ·
Np
Ns
(eq. 10)
Np
Feedback Network
2 · Vmax · (Vmax
*
(Vout
)
Vdiode) ·
Ns
)
R
+
Lleak · Ip2 · freq
(eq. 11)
C
+
Vmax
Vcr · R · freq
(eq. 12)
See AND8023/D page 7 for further information on equations 11 and 12.
(2)
Vmax is the desired peak voltage on the power switch
minus the bulk voltage, Vcr is the clamping ripple usually
20 V, and freq is the switching frequency of the MC33363B.
Most of the values necessary to calculate the secondary
components are complete. To select the diode, the secondary
current peak, the blocking voltage and the forward voltage
drop are the main criteria. Ripple current from the
transformer, the output voltage and the output ripple current
are the criteria to select the output capacitors.
Vblock
+
Vout
)
Vdc · Ns
Np
1
C
+
Vripple · freq
(eq. 13)
(eq. 14)
With the low voltage output requirement, a programmable
precision reference with a low operating voltage is essential.
Isolated feedback networks provide an additional challenge
since optoisolator diode forward voltages remain at 1.25 volts.
With a conventional circuit using the TL431 and TLV431, the
lowest ideal power supply output voltages are 3.75 and 2.5
volts respectively. If the reference operating voltage range is
reduced to 0.9 volts, the minimum output voltage is lowered to
2.15 volts. See Figure 4 for the circuit schematic.
This reduction is significant but will not satisfy a 1.8 volt
output. By adding a resistor and PNP transistor, the
reference voltage is reduced to the emitter–base voltage
drop plus the programmable reference operating voltage.
With the conventional TLV431 the minimum operating
voltage is reduced to 1.95 volts. With the reduced reference
voltage available in the NCP100, the minimum operating
voltage is 1.6 volts. See Figure 5 for the circuit schematic.
Figure 6 illustrates the output voltage ranges between the
TL431, TLV431 and NCP100.
V
out
R3
R1
U2
C2
U1
R2
GND
Utilizing the above equations and previous calculations,
the diode needs to be rated at a minimum of 13 volts and 4.44
amperes. The MBRD835L is selected as the Schottky diode.
The typical forward diode drop is 0.40 volts at 4.0 amperes.
Rubycon capacitor YXG 6.3 volts 820 uF is chosen for the
output filter. The voltage on the output capacitor needs to be
rated twice the output voltage for safety. The rated
maximum allowable ripple current of the capacitors is 0.865
amperes, so 2 capacitors in parallel will be used. A 1.0 uF
ceramic capacitor will also be used in parallel with the
aluminum electrolytics for fast transient response.
Equations 13 and 14 are used to calculate the auxiliary
winding values. The auxiliary winding diode is an ultrafast
recovery surface mount, MURS120. The diode is rated for
1 ampere and 200 volts blocking. The typical forward
voltage drop is 0.6 volts. The higher forward voltage drop is
acceptable due to the lower power requirements of the
auxiliary versus the secondary output. The auxiliary
winding filter is the capacitor on the V
CC
pin.
Figure 4. Traditional Isolated Feedback Network
V
out
R3
Q1
C2
R1
R4
C3
U2
U1
NCP100
R2
GND
Figure 5. 1.8 Volt Isolated Feedback Network
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AND8031/D
36
16
Extended
Range with
PNP
6.0
3.75
3.2
2.5
1.95
TLV431
2.15
1.6
NCP100
Figure 5 illustrates an additional 1.0 uF capacitor, C3,
which is required for normal operation of the NCP100.
Bandwidth concerns are raised when a capacitor is placed
from the cathode to anode of the precision reference. Since
the PNP transistor is used to drive the optocoupler, the
cathode current of the NCP100 is amplified by the beta of the
transistor therefore minimizing the effects of C3. R3 is a
factor in the overall gain of the feedback network and R4
limits the current into the diode of the optocoupler. The
roll–off frequency of the feedback network is related to R1
and C2 only. Figure 7 shows the circuit schematic, the gain
and the phase of the TLV431 and the NCP100 with and
without the PNP.
Power Supply Ideal
Output Voltage Range (V)
TL431
Figure 6. Power Supply Output Voltage Range
Comparison for Programmable Precision References
V
out
R
OSC
R
OSC
V
out
R3
R1
Q1
C2
R3
R1
C2
C3
R2
GND
R4
U1
R2
GND
C3
U1
Figure 7. Schematics for Gain and Phase Comparison of TLV431 and NCP100
Note: C3 only for NCP100
180
40
70
GAIN (dB)
60
50
40
Gain
90
PHASE (°)
GAIN (dB)
0
–90
–180
30
20
Phase
10
0
–10
–20
–30
Gain
Phase
180
90
0
–90
–180
PHASE (°)
10
100
1k
Frequency (Hz)
10 k
100 k
10
100
1k
Frequency (Hz)
10 k
100 k
Figure 8. TLV431 with PNP
Figure 9. TLV431 without PNP
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AND8031/D
60
50
GAIN (dB)
40
30
20
10
10
Gain
180
0
90
–10
PHASE (°)
Phase
0
–90
–180
–40
100
1k
Frequency (Hz)
10 k
100 k
10
100
1k
Frequency (Hz)
10 k
100 k
0
–20
–30
–180
Phase
–90
PHASE (°)
GAIN (dB)
Gain
90
180
Figure 10. NCP100 with PNP
Figure 11. NCP100 without PNP
The values for the components in Figure 7 are as follows.
Rosc = 12 Ohms, R1 = 12 k Ohms, R2 is adjustable
dependant upon U1, R3 and R4 = 100 Ohms, C2 = 0.01 uF,
and C3 = 1.0 uF.
The open loop gain and phase test injects the oscillator
signal across Rosc. The reference voltage is measured
between Rosc and R1 to ground. The test voltage is
measured at the collector of Q1 for the PNP circuit or at the
cathode of U1 for the traditional circuit. Vout is set to 4.0
volts and R2 is adjusted so the DC test voltage is at the center
of its range. R2 is the only component adjusted since it is
neglected for AC analysis.
There are negligible differences for the open loop gain and
phase of the NCP100 with C3 compared to the TLV431
without C3 in the PNP circuit. Therefore there is no penalty
with the added C3 in the NCP100 circuit.
If the PNP transistor is removed, the TLV431 open loop
responses with and without C3 are very similar with a single
pole roll–off. The pole appears to be near 4 Hz.
The NCP100 without the PNP has flat gain until a pole at
1.3 kHz due to R1 and C2. The plot remains at
–20 dB/decade and –90 degree phase margin until well
beyond 100 kHz.
The overall gain of the feedback network can be limited
due to R1, R3 and C2 in Figure 7 . Varying these components
will modify the maximum gain of the system.
Since the NCP100 provides a single pole roll–off, the
MC33363B compensation pin will not provide this function.
The feedback pin of the MC33363B is connected directly to
the reference pin. This will keep the output of the error amp
low. A diode is in series with the output of the op–amp
allowing the compensation pin to directly control the
feedback to the oscillator ramp. The compensation pin is
connected to the feedback pin via a 2.7 k Ohm resistor. The
collector of the optocoupler is also connected to the
compensation pin and the emitter is grounded. This
completes the design of the system. See Figure 14 for the
board layout of the schematic in Figure 1 and Table 1 for the
component values.
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