Features
•
Industry-standard Architecture
•
•
•
•
•
– Low-cost, Easy-to-use Software Tools
High-speed, Electrically Erasable Programmable Logic Devices
– 5 ns Maximum Pin-to-pin Delay
CMOS- and TTL-compatible Inputs and Outputs
– Latch Feature Holds Inputs to Previous Logic States
Pin-controlled Standby Power (10 µA Typical)
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High-reliability CMOS Process
– 20-year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
Dual Inline and Surface Mount Packages in Standard Pinouts
PCI-compliant
True Input Transition Detection “Z” and “QZ” Version
•
•
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High-
performance
EE PLD
ATF22V10C
ATF22V10CQ
See separate datasheet
for ATF22V10CZ and
ATF22V10CQZ options.
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
Pin Configurations
All Pinouts Top View
Pin Name
CLK
IN
I/O
GND
VCC
PD
Function
Clock
Logic Inputs
Bi-directional Buffers
Ground
+5V Supply
Power-down
PLCC
IN
IN
CLK/IN
VCC*
VCC
I/O
I/O
TSSOP
CLK/IN
IN
IN
IN/PD
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
DIP/SOIC
CLK/IN
IN
IN
IN/PD
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
4
3
2
1
28
27
26
Note:
For all PLCCs (except “-5”), pins 1, 8, 15 and 22 can be
left unconnected. However, if they are connected, supe-
rior performance will be achieved.
Rev. 0735P–PLD–01/02
IN
IN
GND
GND*
IN
I/O
I/O
12
13
14
15
16
17
18
IN/PD
IN
IN
GND*
IN
IN
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
GND*
I/O
I/O
I/O
1
Logic Diagram
Description
The ATF22V10C is a high-performance CMOS (electrically erasable) programmable
logic device (PLD) that utilizes Atmel’s proven electrically erasable Flash memory tech-
nology. Speeds down to 5 ns and power dissipation as low as 100 µA are offered. All
speed ranges are specified over the full 5V ± 10% range for industrial temperature
ranges, and 5V ± 5% for commercial temperature ranges.
Several low-power options allow selection of the best solution for various types of
power-limited applications. Each of these options significantly reduces total system
power and enhances system reliability.
Absolute Maximum Ratings*
Temperature under Bias .................................. -40°C to +85°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on Input Pins
with Respect to Ground
during Programming .....................................-2.0V to +14.0V
(1)
Note:
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
1.
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Minimum voltage is -0.6V DC, which may under-
shoot to -2.0V for pulses of less than 20 ns.
Maximum output pin voltage is V
CC
+ 0.75V DC,
which may overshoot to 7.0V for pulses of less
than 20 ns.
DC and AC Operating Conditions
Commercial
Operating Temperature (Ambient)
V
CC
Power Supply
0°C - 70°C
5V ± 5%
Industrial
-40°C - 85°C
5V ± 10%
2
ATF22V10C(Q)
0735P–PLD–01/02
ATF22V10C(Q)
Compiler Mode Selection
PAL Mode
(5828 Fuses)
Synario
WINCUPL
Note:
ATF22V10C (DIP)
ATF22V10C (PLCC)
P22V10
P22V10LCC
GAL Mode
(5892 Fuses)
ATTF22V10C DIP (UES)
ATF22C10C PLCC (UES)
G22V10
G22V10LCC
Power-down Mode
(1)
(5893 Fuses)
ATF22V10C DIP (PWD)
ATF22V10C PLCC (PWD)
G22V10CP
G22V10CPLCC
1. These device types will create a JEDEC file which when programmed in ATF22V10C devices will enable the power-down
mode feature. All other device types have the feature disabled.
DC Characteristics
Symbol
I
IL
I
IH
Parameter
Input or I/O Low
Leakage Current
Input or I/O High
Leakage Current
Condition
0
≤
V
IN
≤
V
IL
(Max)
3.5
≤
V
IN
≤
V
CC
C-5, 7, 10
C-10
I
CC
Power Supply Current,
Standby
V
CC
= Max,
V
IN
= Max,
Outputs Open
C-15
C-15
CQ-15
CQ-15
C-5, 7, 10
C-10
I
CC2
Clocked Power Supply
Current
V
CC
= Max, Outputs Open,
f = 15 MHz
C-15
C-15
CQ-15
CQ-15
I
PD
I
OS(1)
V
IL
V
IH
V
OL
Power Supply Current,
PD Mode
Output Short Circuit
Current
Input Low Voltage
Input High Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OL
= 16 mA
I
OL
= 12 mA
I
OH
= -4.0 mA
Com.,
Ind.
Mil.
2.4
V
CC
= Max
V
IN
= 0, Max
V
OUT
= 0.5V
-0.5
2.0
Com.
Ind.
Com.
Ind.
Com.
Ind.
Com.
Ind.
Com.
Ind.
Com.
Ind.
Com.
Ind.
70.0
70.0
40.0
40.0
10.0
10.0
85.0
90.0
65.0
65.0
35.0
35.0
Min
Typ
-35.0
Max
-10.0
10.0
130.0
140.0
90.0
115.0
55.0
70.0
150.0
160.0
90.0
90.0
60.0
80.0
100.0
100.0
-130.0
0.8
V
CC
+0.75
0.5
0.5
Units
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
mA
V
V
V
V
V
Output Low Voltage
V
OH
Note:
Output High Voltage
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
3
0735P–PLD–01/02
AC Waveforms
(1)
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
AC Characteristics
(1)
-5
Symbol
t
PD
t
CO
t
CF
t
S
t
H
Parameter
Input or Feedback to Combinatorial
Output
Clock to Output
Clock to Feedback
Input or Feedback Setup Time
Hold Time
External Feedback 1/(t
S
+ t
CO
)
f
MAX
Internal Feedback 1/(t
S
+ t
CF
)
No Feedback 1/(t
WH
+ t
WL
)
t
W
t
EA
t
ER
t
AP
t
AW
t
AR
t
SP
t
SPR
Notes:
Clock Width (t
WL
and t
WH
)
Input or I/O to Output Enable
Input or I/O to Output Disable
Input or I/O to Asynchronous Reset of
Register
Asynchronous Reset Width
Asynchronous Reset Recovery Time
Setup Time, Synchronous Preset
Synchronous Preset to Clock
Recovery Time
3.0
0
142.0
166.0
166.0
3.0
2.0
2.0
3.0
5.5
4.0
4.0
4.0
6.0
5.0
7.0
Min
1.0
1.0
Max
5.0
4.0
2.5
3.5
0
125.0
(3)
142.0
166.0
3.0
3.0
3.0
3.0
7.0
5.0
4.5
5.0
7.5
7.5
10.0
Min
3.0
2.0
-7
Max
7.5
4.5
(2)
2.5
4.5
0
90.0
117.0
125.0
3.0
3.0
3.0
3.0
8.0
6.0
6.0
8.0
10.0
9.0
12.0
Min
3.0
2.0
-10
Max
10.0
6.5
2.5
10.0
0
55.5
80.0
83.3
6.0
3.0
3.0
3.0
15.0
15.0
20.0
15.0
10.0
10.0
10.0
Min
3.0
2.0
-15
Max
15.0
8.0
2.5
Units
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
1. See ordering information for valid part numbers.
2. 5.5 ns for DIP package devices.
3. 111 MHz for DIP package devices.
4
ATF22V10C(Q)
0735P–PLD–01/02
ATF22V10C(Q)
Power-down AC Characteristics
(1)(2)(3)
-5
Symbol
t
IVDH
t
GVDH
t
CVDH
t
DHIX
t
DHGX
t
DHCX
t
DLIV
t
DLGV
t
DLCV
t
DLOV
Notes:
Parameter
Valid Input before PD High
Valid OE before PD High
Valid Clock before PD High
Input Don’t Care after PD High
OE Don’t Care after PD High
Clock Don’t Care after PD High
PD Low to Valid Input
PD Low to Valid OE
PD Low to Valid Clock
PD Low to Valid Output
1. Output data is latched and held.
2. High-Z outputs remain high-Z.
3. Clock and input transitions are ignored.
Min
5.0
0
0
5.0
5.0
5.0
5.0
15.0
15.0
20.0
Max
Min
7.5
0
0
7.0
7.0
7.0
7.5
20.0
20.0
25.0
-7
Max
Min
10.0
0
0
10.0
10.0
10.0
10.0
25.0
25.0
30.0
15.0
15.0
15.0
15.0
30.0
30.0
35.0
-10
Max
Min
15.0
0
-15
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Input Test Waveforms and Measurement Levels
Commercial Output Test Loads
Pin Capacitance
f = 1 MHz, T = 25°C
(1)
Typ
C
IN
C
OUT
Note:
5
6
Max
8
8
Units
pF
pF
Conditions
V
IN
= 0V
V
OUT
= 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
0735P–PLD–01/02
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