M76DW52003TA70ZT datasheet, PDF

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M76DW52003TA70ZT: Description32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product; Categorystorage storage; File Size150KB，27 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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M76DW52003TA70ZT Overview

32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product

M76DW52003TA70ZT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	BGA
package instruction	8 X 11.60 MM, 0.80 MM PITCH, LFBGA-73
Contacts	73
Reach Compliance Code	compli
Maximum access time	70 ns
Other features	STATIC RAM IS ORGANIZED AS 256K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 4M X 8
JESD-30 code	R-PBGA-B73
JESD-609 code	e0
length	11.6 mm
memory density	33554432 bi
Memory IC Type	MEMORY CIRCUIT
memory width	16
Mixed memory types	FLASH+SRAM
Number of functions	1
Number of terminals	73
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA73,10X12,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3,3/3.3 V
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum standby current	0.0001 A
Maximum slew rate	0.02 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	8 mm
Base Number Matches	1

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M76DW52003TA

M76DW52003BA

32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory

and 4Mbit (256Kb x16) SRAM, Multiple Memory Product

PRELIMINARY DATA

FEATURES SUMMARY

■

MULTIPLE MEMORY PRODUCT

– 32 Mbit (4Mb x8 or 2Mb x16), Dual Bank, Boot

Block, Flash Memory

– 4 Mbit (256Kb x 16) SRAM

■

SUPPLY VOLTAGE

– V

CCF

= 2.7V to 3.3V

– V

CCS

= 2.7V to 3.3V

– V

PPF

= 12V for Fast Program (optional)

■

Figure 1. Package

FBGA

ACCESS TIME: 70, 90ns

LOW POWER CONSUMPTION

ELECTRONIC SIGNATURE

– Manufacturer Code: 0020h

– Top Device Code, M76DW52003TA: 225Eh

– Bottom Device Code, M76DW52003BA:

225Fh

LFBGA73 (ZA)

8 x 11.6 mm

FLASH MEMORY

■

PROGRAMMING TIME

– 10µs per Byte/Word typical

– Double Word/ Quadruple Byte Program

■

EXTENDED MEMORY BLOCK

– Extra block used as security block or to store

additional information

MEMORY BLOCKS

– Dual Bank Memory Array: 8Mbit+24Mbit

– Parameter Blocks (Top or Bottom Location)

■

100,000 PROGRAM/ERASE CYCLES per

BLOCK

■

DUAL OPERATIONS

– Read in one bank while Program or Erase in

other

SRAM

■

4 Mbit (256Kb x 16)

■

ACCESS TIME: 70ns

LOW V

CCS

DATA RETENTION: 1.5V

POWER DOWN FEATURES USING TWO

CHIP ENABLE INPUTS

■

ERASE SUSPEND and RESUME MODES

– Read and Program another Block during

Erase Suspend

■

UNLOCK BYPASS PROGRAM COMMAND

– Faster Production/Batch Programming

/WP PIN for FAST PROGRAM and WRITE

PROTECT

TEMPORARY BLOCK UNPROTECTION

MODE

COMMON FLASH INTERFACE

– 64 bit Security Code

■

September 2003

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

1/27

M76DW52003TA, M76DW52003BA

TABLE OF CONTENTS

SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3. LFBGA Connections (Top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Address Inputs (A0-A17). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Address Inputs (A18-A20). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Data Inputs/Outputs (DQ0-DQ7). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Data Inputs/Outputs (DQ8-DQ14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Data Input/Output or Address Input (DQ15A–1).. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Flash Chip Enable (EF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Output Enable (G). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Write Enable (W). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

PP/

Write Protect (V

PP/

WP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Reset/Block Temporary Unprotect (RPF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Ready/Busy Output (RB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Byte/Word Organization Select (BYTE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SRAM Chip Enable (E1S, E2S). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SRAM Upper Byte Enable (UBS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SRAM Lower Byte Enable (LBS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

CCF

Supply Voltage (2.7V to 3.3V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

CCS

Supply Voltage (2.7V to 3.3V).. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Ground.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 2. Main Operation Modes, BYTE = VIH(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

FLASH MEMORY DEVICE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

SRAM DEVICE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5. SRAM Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

SRAM OPERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Read . . . . . . . . . . . . . . . . . . . . . . .

Write . . . . . . . . . . . . . . . . . . . . . . .

Standby/Power-Down . . . . . . . . . .

Data Retention. . . . . . . . . . . . . . . .

Output Disable . . . . . . . . . . . . . . . .

.......

......

.......

......

.......

......

. . . . 11

FLASH MEMORY DEVICE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 3. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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M76DW52003TA, M76DW52003BA

DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 4. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 5. Device Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 6. Flash DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 7. SRAM DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. SRAM Read Mode AC Waveforms, Address Controlled . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 9. SRAM Read AC Waveforms, G Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10. SRAM Standby AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 8. SRAM Read AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11. SRAM Write AC Waveforms, W Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. SRAM Write AC Waveforms, E1S Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 13. SRAM Write AC Waveforms, W Controlled with G Low . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 14. SRAM Write Cycle Waveform, UBS and LBS Controlled, G Low . . . . . . . . . . . . . . . . . 20

Table 9. SRAM Write AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 15. SRAM Low V

CCS

Data Retention AC Waveforms, E1

or UB

/ LB

Controlled. . . . . . 22

Table 10. SRAM Low V

CCS

Data Retention Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

SRAM Read Mode AC Waveforms, Address Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 16. Stacked LFBGA73 8x11.6mm, 10x12 array, 0.8mm pitch, Bottom View Package Outline

Table 11. Stacked LFBGA73 8x11.6mm, 10x12 array, 0.8mm pitch, Package Mechanical Data. . 24

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 12. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 13. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3/27

M76DW52003TA70ZT Related Products

	M76DW52003TA70ZT	M76DW52003BA	M76DW52003BA70ZT	M76DW52003TA	M76DW52003BA90ZT	M76DW52003TA90ZT
Description	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product	32Mbit (4Mb x8/ 2Mb x16, Dual Bank, Boot Block) Flash Memory and 4Mbit (256Kb x16) SRAM, Multiple Memory Product
Is it Rohs certified?	incompatible	-	incompatible	-	incompatible	incompatible
Parts packaging code	BGA	-	BGA	-	BGA	BGA
package instruction	8 X 11.60 MM, 0.80 MM PITCH, LFBGA-73	-	8 X 11.60 MM, 0.80 MM PITCH, LFBGA-73	-	8 X 11.60 MM, 0.80 MM PITCH, LFBGA-73	8 X 11.60 MM, 0.80 MM PITCH, LFBGA-73
Contacts	73	-	73	-	73	73
Reach Compliance Code	compli	-	compli	-	compli	compli
Maximum access time	70 ns	-	70 ns	-	90 ns	90 ns
Other features	STATIC RAM IS ORGANIZED AS 256K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 4M X 8	-	STATIC RAM IS ORGANIZED AS 256K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 4M X 8	-	STATIC RAM IS ORGANIZED AS 256K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 4M X 8	STATIC RAM IS ORGANIZED AS 256K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 4M X 8
JESD-30 code	R-PBGA-B73	-	R-PBGA-B73	-	R-PBGA-B73	R-PBGA-B73
JESD-609 code	e0	-	e0	-	e0	e0
length	11.6 mm	-	11.6 mm	-	11.6 mm	11.6 mm
memory density	33554432 bi	-	33554432 bi	-	33554432 bi	33554432 bi
Memory IC Type	MEMORY CIRCUIT	-	MEMORY CIRCUIT	-	MEMORY CIRCUIT	MEMORY CIRCUIT
memory width	16	-	16	-	16	16
Mixed memory types	FLASH+SRAM	-	FLASH+SRAM	-	FLASH+SRAM	FLASH+SRAM
Number of functions	1	-	1	-	1	1
Number of terminals	73	-	73	-	73	73
word count	2097152 words	-	2097152 words	-	2097152 words	2097152 words
character code	2000000	-	2000000	-	2000000	2000000
Operating mode	ASYNCHRONOUS	-	ASYNCHRONOUS	-	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	-	85 °C	-	85 °C	85 °C
Minimum operating temperature	-40 °C	-	-40 °C	-	-40 °C	-40 °C
organize	2MX16	-	2MX16	-	2MX16	2MX16
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	-	LFBGA	-	LFBGA	LFBGA
Encapsulate equivalent code	BGA73,10X12,32	-	BGA73,10X12,32	-	BGA73,10X12,32	BGA73,10X12,32
Package shape	RECTANGULAR	-	RECTANGULAR	-	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	-	GRID ARRAY, LOW PROFILE, FINE PITCH	-	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED
power supply	3,3/3.3 V	-	3,3/3.3 V	-	3,3/3.3 V	3,3/3.3 V
Certification status	Not Qualified	-	Not Qualified	-	Not Qualified	Not Qualified
Maximum seat height	1.4 mm	-	1.4 mm	-	1.4 mm	1.4 mm
Maximum standby current	0.0001 A	-	0.0001 A	-	0.0001 A	0.0001 A
Maximum slew rate	0.02 mA	-	0.02 mA	-	0.02 mA	0.02 mA
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	2.7 V	-	2.7 V	-	2.7 V	2.7 V
Nominal supply voltage (Vsup)	3 V	-	3 V	-	3 V	3 V
surface mount	YES	-	YES	-	YES	YES
technology	CMOS	-	CMOS	-	CMOS	CMOS
Temperature level	INDUSTRIAL	-	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	-	TIN LEAD	-	TIN LEAD	TIN LEAD
Terminal form	BALL	-	BALL	-	BALL	BALL
Terminal pitch	0.8 mm	-	0.8 mm	-	0.8 mm	0.8 mm
Terminal location	BOTTOM	-	BOTTOM	-	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED
width	8 mm	-	8 mm	-	8 mm	8 mm

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