L29C101GME45 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> L29C101GME45

L29C101GME45: DescriptionBit-Slice Processor, 16-Bit, CMOS, CPGA68, PGA-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size417KB，13 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

Download Datasheet Parametric Compare View All

L29C101GME45 Overview

Bit-Slice Processor, 16-Bit, CMOS, CPGA68, PGA-68

L29C101GME45 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA, PGA68,11X11
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ
maximum clock frequency	25 MHz
External data bus width	16
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	28.0416 mm
Humidity sensitivity level	3
Number of terminals	68
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B (Modified)
Maximum seat height	4.445 mm
Maximum slew rate	30 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	28.0416 mm
uPs/uCs/peripheral integrated circuit type	BIT-SLICE MICROPROCESSOR
Base Number Matches	1

Preview

Download Datasheet

View All

This Material Copyrighted By Its Respective Manufacturer

L29C101GME45 Related Products

	L29C101GME45	L29C101PC35	L29C101DM45	L29C101DC35	L29C101GM45	L29C101DME45	L29C101GC35	L29C101GMB45	L29C101KME45
Description	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, PDIP64, 0.900 INCH, PLASTIC, DIP-64	Bit-Slice Processor, 16-Bit, CMOS, CDIP64, 0.900 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-64	Bit-Slice Processor, 16-Bit, CMOS, CDIP64, 0.900 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-64	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CAVITY UP, CERAMIC, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, CDIP64, 0.900 INCH, HERMETIC SEALED, SIDE BRAZED, DIP-64	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CERAMIC, PGA-68	Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CAVITY UP, CERAMIC, PGA-68	Bit-Slice Processor, CMOS, CQCC68
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices	LOGIC Devices
package instruction	PGA, PGA68,11X11	DIP, DIP64,.9	DIP, DIP64,.9	DIP, DIP64,.9	PGA, PGA68,11X11	DIP, DIP64,.9	PGA, PGA68,11X11	PGA, PGA68,11X11	QCCN, LCC68,.95SQ
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
JESD-30 code	S-CPGA-P68	R-PDIP-T64	R-CDIP-T64	R-CDIP-T64	S-CPGA-P68	R-CDIP-T64	S-CPGA-P68	S-CPGA-P68	S-XQCC-N68
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
Humidity sensitivity level	3	3	3	3	3	3	3	3	3
Number of terminals	68	64	64	64	68	64	68	68	68
Maximum operating temperature	125 °C	70 °C	125 °C	70 °C	125 °C	125 °C	70 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-	-55 °C	-	-55 °C	-55 °C	-	-55 °C	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC
encapsulated code	PGA	DIP	DIP	DIP	PGA	DIP	PGA	PGA	QCCN
Encapsulate equivalent code	PGA68,11X11	DIP64,.9	DIP64,.9	DIP64,.9	PGA68,11X11	DIP64,.9	PGA68,11X11	PGA68,11X11	LCC68,.95SQ
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	IN-LINE	IN-LINE	IN-LINE	GRID ARRAY	IN-LINE	GRID ARRAY	GRID ARRAY	CHIP CARRIER
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum slew rate	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	COMMERCIAL	MILITARY	COMMERCIAL	MILITARY	MILITARY	COMMERCIAL	MILITARY	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	PIN/PEG	THROUGH-HOLE	PIN/PEG	PIN/PEG	NO LEAD
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	PERPENDICULAR	DUAL	DUAL	DUAL	PERPENDICULAR	DUAL	PERPENDICULAR	PERPENDICULAR	QUAD
uPs/uCs/peripheral integrated circuit type	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR	BIT-SLICE MICROPROCESSOR
Parts packaging code	PGA	DIP	DIP	DIP	PGA	DIP	PGA	PGA	-
Contacts	68	64	64	64	68	64	68	68	-
ECCN code	3A001.A.2.C	3A991.A.2	3A001.A.2.C	3A991.A.2	3A001.A.2.C	3A001.A.2.C	3A991.A.2	3A001.A.2.C	-
Other features	9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	16 X 16-BIT DUAL PORT REGISTER FILE; 9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	16 X 16-BIT DUAL PORT REGISTER FILE; 9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	16 X 16-BIT DUAL PORT REGISTER FILE; 9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	16 X 16-BIT DUAL PORT REGISTER FILE; 9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	16 X 16-BIT DUAL PORT REGISTER FILE; 9 BIT INSTRUCTION DECODER; ICC SPECIFIED @ 5MHZ	-
maximum clock frequency	25 MHz	30 MHz	25 MHz	30 MHz	25 MHz	25 MHz	30 MHz	25 MHz	-
External data bus width	16	16	16	16	16	16	16	16	-
length	28.0416 mm	81.28 mm	81.28 mm	81.28 mm	29.464 mm	81.28 mm	29.464 mm	29.464 mm	-
Peak Reflow Temperature (Celsius)	225	225	225	225	225	225	225	225	-
Maximum seat height	4.445 mm	5.08 mm	3.81 mm	3.81 mm	4.4196 mm	3.81 mm	4.4196 mm	4.4196 mm	-
Maximum supply voltage	5.5 V	5.25 V	5.5 V	5.25 V	5.5 V	5.5 V	5.25 V	5.5 V	-
Minimum supply voltage	4.5 V	4.75 V	4.5 V	4.75 V	4.5 V	4.5 V	4.75 V	4.5 V	-
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-
width	28.0416 mm	22.86 mm	22.86 mm	22.86 mm	29.464 mm	22.86 mm	29.464 mm	29.464 mm	-

Recommended Resources

Special dangerous restricted area prompt circuit

Exhaust fan automatic control circuit (3)

Simple sensitive circuit diagram for portable use

Self-oscillating flyback converter

Complementary AC Power Switching Circuit

CMOS integrated analog switch control circuit

What is the difference between LPM0 and LPM1?: I have a question for you guys:I use DCO to multiply the frequency to 8M,LPM0: MCLK OFF, SMCLK ON, ACLKON, DCO ONLPM1: MCLK OFF, SMCLK ON, ACLK ON, DCO ON (DCO is used for MCLK and SMCLK)(1) I don't k...; muxuchen Microcontroller MCU

EEWORLD University ---- Introduction to Atmel High-Performance MPU: Introduction to Atmel High-Performance MPU : https://training.eeworld.com.cn/course/38Atmel exhibited its latest high-performance, video-enabled ARM Cortex-A5-based microprocessor, the SAM A5D4, at th...; dongcuipin MCU

Xianji official data package: Review of Xianji HPM6750: @full_stack@arilink@Knight of the Sun@xusiwei1236@RCSN@littleshrimp Download the complete data package of the HPM6750 development board from Xianji: Link: https://pan.baidu.com/s/1qvyXhhbDmn4ug3oJeHJr...; nmg Domestic Chip Exchange

[Reprint]. Brief introduction to SSRAM, SDRAM and Flash. [Memory]: Reposted from CalmBright’s blog: http://www.cnblogs.com/CalmBright/archive/2009/07/19/1526569.htmlAbstract When debugging sdram with NIos II, I encountered a problem with its capacity calculation. Her...; yuphone FPGA/CPLD

What should I pay attention to when designing RFID? What books should beginners read?: What should I pay attention to when designing RFID? What books should beginners read?...; zjr123 RF/Wirelessly

Cucumber suddenly got sick: A few days ago, I bought a few cucumbers in the supermarket. I didn't eat them at the time. One time, I suddenly found that the cucumbers seemed to be sick, and their heads became bigger. Before, I en...; ienglgge Talking

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components