QN82C55A-2 datasheet, PDF - EEWORLD Datasheet

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QN82C55A-2: DescriptionParallel I/O Port, 24 I/O, CMOS, PQCC44, PLASTIC, LCC-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size523KB，23 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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QN82C55A-2 Overview

Parallel I/O Port, 24 I/O, CMOS, PQCC44, PLASTIC, LCC-44

QN82C55A-2 Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	LCC
package instruction	QCCJ,
Contacts	44
Reach Compliance Code	unknown
ECCN code	EAR99
maximum clock frequency	8 MHz
External data bus width	8
JESD-30 code	S-PQCC-J44
length	16.6 mm
Number of I/O lines	24
Number of ports	3
Number of terminals	44
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum slew rate	10 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	16.6 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE

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QN82C55A-2 Related Products

	QN82C55A-2	QD82C55A-2	D82C55A-2	LD82C55A-2	QP82C55A-2	TD82C55A-2
Description	Parallel I/O Port, 24 I/O, CMOS, PQCC44, PLASTIC, LCC-44	Parallel I/O Port, 24 I/O, CMOS, CDIP40, DIP-40	Parallel I/O Port, 24 I/O, CMOS, CDIP40, DIP-40	Parallel I/O Port, 24 I/O, CMOS, CDIP40, DIP-40	Parallel I/O Port, 24 I/O, CMOS, PDIP40, DIP-40	Parallel I/O Port, 24 I/O, CMOS, CDIP40, DIP-40
Parts packaging code	LCC	DIP	DIP	DIP	DIP	DIP
package instruction	QCCJ,	DIP,	DIP,	DIP,	DIP, DIP40,.6	DIP,
Contacts	44	40	40	40	40	40
Reach Compliance Code	unknown	unknown	unknown	unknown	compliant	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
maximum clock frequency	8 MHz	8 MHz	8 MHz	8 MHz	8 MHz	8 MHz
External data bus width	8	8	8	8	8	8
JESD-30 code	S-PQCC-J44	R-GDIP-T40	R-GDIP-T40	R-GDIP-T40	R-PDIP-T40	R-GDIP-T40
length	16.6 mm	52.325 mm	52.325 mm	52.325 mm	52.26 mm	52.325 mm
Number of I/O lines	24	24	24	24	24	24
Number of ports	3	3	3	3	3	3
Number of terminals	44	40	40	40	40	40
Maximum operating temperature	70 °C	70 °C	70 °C	85 °C	70 °C	85 °C
Package body material	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED
encapsulated code	QCCJ	DIP	DIP	DIP	DIP	DIP
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	5.72 mm	5.72 mm	5.72 mm	5.08 mm	5.72 mm
Maximum slew rate	10 mA	10 mA	10 mA	10 mA	10 mA	10 mA
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal form	J BEND	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	1.27 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	QUAD	DUAL	DUAL	DUAL	DUAL	DUAL
width	16.6 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm	15.24 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE
Maker	Intel	Intel	-	-	Intel	Intel
Maximum supply voltage	5.5 V	5.5 V	5.5 V	-	5.5 V	-
Minimum supply voltage	4.5 V	4.5 V	4.5 V	-	4.5 V	-

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