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MC10125FNR2

Description
QUAD ECL TO TTL TRANSLATOR, TRUE OUTPUT, PQCC20, PLASTIC, LCC-20
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size127KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Related ProductsFound11parts with similar functions to MC10125FNR2
Download Datasheet Parametric View All

MC10125FNR2 Overview

QUAD ECL TO TTL TRANSLATOR, TRUE OUTPUT, PQCC20, PLASTIC, LCC-20

MC10125FNR2 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeQLCC
package instructionPLASTIC, LCC-20
Contacts20
Reach Compliance Code_compli
ECCN codeEAR99
maximum delay6 ns
Interface integrated circuit typeECL TO TTL TRANSLATOR
JESD-30 codeS-PQCC-J20
JESD-609 codee0
length8.965 mm
Humidity sensitivity level1
Nominal negative supply voltage-5.2 V
Number of digits1
Number of functions4
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-30 °C
Output characteristicsTOTEM-POLE
Output latch or registerNONE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC20,.4SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5,-5.2 V
Certification statusNot Qualified
Maximum seat height4.57 mm
Nominal supply voltage5 V
surface mountYES
technologyECL10K
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width8.965 mm
Base Number Matches1
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad MECL to TTL Translator
The MC10125 is a quad translator for interfacing data and control signals
between the MECL section and saturated logic sections of digital systems. The
MC10125 incorporates differential inputs and Schottky TTL “totem pole”
outputs. Differential inputs allow for use as an inverting/ non–inverting translator
or as a differential line receiver. The VBB reference voltage is available on pin 1
for use in single–ended input biasing. The outputs of the MC10125 go to a low
logic level whenever the inputs are left floating.
Power supply requirements are ground, +5.0 Volts and –5.2 Volts.
Propagation delay of the MC10125 is typically 4.5 ns. The MC10125 has fanout
of 10 TTL loads. The dc levels are MECL 10,000 in and Schottky TTL, or TTL
out. This device has an input common mode noise rejection of
±
1.0 Volt.
An advantage of this device is that MECL level information can be received,
via balanced twisted pair lines, in the TTL equipment. This isolates the MECL
logic from the noisy TTL environment. This device is useful in computers,
instrumentation, peripheral controllers, test equipment and digital
communications systems.
MC10125
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
PD = 380 mW typ/pkg (No Load)
tpd = 4.5 ns typ (50% to + 1.5 Vdc out)
tr, tf = 2.5 ns typ (1.0 V to 2.0 V)
VBB
DIP
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
DIN
DIN
DOUT
COUT
CIN
CIN
VCC
LOGIC DIAGRAM
2
3
6
7
10
11
14
15
VBB*
Gnd
=
VCC (+5.0Vdc) =
VEE (–5.2Vdc) =
PIN 16
PIN 9
PIN 8
4
AIN
AIN
AOUT
BOUT
BIN
12
BIN
VEE
5
13
1
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
* VBB to be used to supply bias to the MC10125 only and bypassed (when used)
with 0.01
µF
to 0.1
µF
capacitor to ground (0 V). VBB can source < 1.0 mA.
When the input pin with the bubble goes positive, the output goes negative.
3/93
©
Motorola, Inc. 1996
3–89
REV 5

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