• You can log in to your eeworld account to continue watching:
  • Control system design based on root locus (continued 1)
  • Login
  • Duration:23 minutes and 45 seconds
  • Date:2019/09/24
  • Uploader:抛砖引玉
Introduction
The course on automatic control principles at the National University of Defense Technology takes classical control theory as the main content, and also includes parts of modern control theory and digital control systems. Classical control theory mainly introduces the mathematical model of the control system, control system performance, control system stability, root locus method, frequency response method, frequency domain stability, frequency response design method, etc.; modern control theory mainly introduces the state space model, energy Controllability and observability, state variable feedback control system design, state observer design, etc.; digital control system mainly introduces sampling and hold, Z transformation, mathematical model of digital control system, performance analysis of digital control system, and digital control system design. wait.
The main purpose of this course is to enable learners to systematically understand and master the basic concepts, theories and methods of automatic control principles, to be able to analyze and design controllers according to the needs of practical engineering problems, and to use feedback control thinking methods to solve practical problems in engineering. , laying a solid theoretical foundation for scientific research and engineering practice in related technical fields.
Unfold ↓

You Might Like

Recommended Posts

Problems with connecting modules in Verilog
The code is as follows: Why is there an exclamation mark before rst_n? Is it written wrong? This is the example from the lattice official website. If you see it, please reply. Thank you input rst_n; E
刘成云 FPGA/CPLD
Introduce DSP/BIOS hardware interrupt management
When developing applications using the DSP/BIOS kernel, users cannot modify the location of the interrupt vector table at will. The interrupt vector table will be determined by the MEM module in the D
Aguilera DSP and ARM Processors
The size of the parameter void* buff in the f_read function in fatfs, /* [OUT] Buffer to store read data */
What I need to read is a txt file. This file has 345600 lines, and each line is a three-digit decimal. It seems that the maximum value stored in buff cannot exceed 512*128. Now, for example, I need to
cdcc0606 stm32/stm8
MTK LCD driver initialization
Can any expert tell me what the following driver initialization code does? void LCD_Init_S6B33BF(kal_uint32 bkground, void **buf_addr) { volatile kal_uint32 i; kal_uint16 background = (kal_uint16)bkgr
cool8008 Embedded System
Experts please come in! ..Depressing question:
1. Why do I use NdisAllocateMemoryWithTag to apply for memory, and then release it with NdisFreeMemory! Sometimes I get a blue screen. I use NdisAllocateMemoryWithTag(&pPacketContent,TotalPacketLength
szhengxindz Embedded System
Be the first to experience the Mir MYS-8MMX embedded single board computer for free!
IMX 8M Mini is NXP's latest multi-core application processor built with advanced 14LPC FinFET process technology, providing faster speed and higher power efficiency. Shenzhen Mir Electronics has also
okhxyyo Special Edition for Assessment Centres

Recommended Content

Circuit

可能感兴趣器件

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号