When sampling industrial-level signals, fast, high-resolution conversion information must be provided. Typically, the analog-to-digital converter (ADC) resolution can be 14-bit to 18-bit when sampling rates are up to 500 kSPS. The circuit shown in Figure 1 is a single-supply system optimized for industrial-level signal sampling using a 24-bit, 250 kSPS Σ-Δ ADC. Each of the two differential channels or four pseudo-differential channels is capable of delivering 17.2 bits of noise-free code resolution at a sampling rate of 50kSPS.

This circuit uses an innovative differential amplifier with built-in laser trimmed resistors to achieve attenuation and level conversion. It uses a precision ADC with low power supply voltage to obtain standard industrial level signals of ±5 V, ±10 V, and 0 V to 10 V and perform Issues with digital processing. This circuit can be used in process control (PLC/DCS modules), medical and scientific multi-channel instruments and chromatographs.

The industrial level signal is applied to the AD8475 precision differential attenuation amplifier, which can attenuate the input signal by 0.8 times or 0.4 times. It integrates precision resistors that are trimmed and matched to control attenuation. When the AD8475 uses a single 5 V supply and the gain is set to 0.4, it supports single-ended or differential inputs up to ±12.5 V. The device provides input overvoltage protection up to ±15 V.

The AD8475 and AD7176-2 device combination maintains linearity when the input signal (with a gain of 0.4) is within the ±10 V single-ended or differential input range , as shown by the measured INL in Figure 4; the measured endpoints are − 10 V and +10 V. At this point, the output of the AD8475 swings between 0.5 V and 4.5 V.

The common-mode output is set by applying the desired common-mode voltage to the VOCM pin. In the circuit shown in Figure 1, the common-mode voltage is set by applying the 2.5 V REFOUT voltage of the AD7176-2 to the VOCM pin of the AD8475.

The AD8475 provides attenuation and level shifting to drive the sampling capacitor input of the AD7176-2; power consumption is only 3.2 mA.

The output of the AD8475 amplifier is connected to an RC filter network that provides differential and common-mode noise filtering and the dynamic charging of the AD7176-2 input sampling capacitor. This network also isolates the amplifier output from kickback from the dynamic switched capacitor input. Common-mode bandwidth (RIN, C1) is 59 MHz. The differential mode bandwidth (2 × RIN, 0.5C1 + C3) is 9.8 MHz.

The AD8475 can also be set up to accept single-ended signals. Connect the −IN 0.4× input to ground and apply a single-ended signal to the +IN 0.4× input.

The AD7176-2 24-bit, Σ-Δ ADC samples the output of the AD8475 and converts it to a digital output. Slew rate and digital filter characteristics are adjustable for output data rates from 5 SPS to 250 kSPS.

The AD7176-2 can be configured as two fully differential inputs or four pseudo-differential inputs. The ADC supports channel scan rates up to 50 kSPS. The noise-free bit performance of the AD7176-2 is 17.2 bits (250 kSPS); 20.8 bits (1 kSPS); and 21.7 bits (50 SPS).

Figure 2 shows the total system effective rms noise when the input is grounded. At a data rate of 250 kSPS, the effective rms noise is approximately 30μV rms. Please note that at full scale, the linearity of this circuit is optimal at a ±10 V input, and the full scale input is set to 20 V pp during calculations.

Effective resolution is expressed in bits and is calculated relative to a 20 V full-scale input range as:

Figure 3 shows the effective resolution in rms bits as a function of the output data rate, measured with the inputs shorted.

By first converting the rms noise to an approximation of peak-to-peak noise (multiplying the rms noise by a factor of 6.6), the effective resolution can be converted to noise-free code resolution. This is calculated to be approximately 2.7 bits, which is subsequently subtracted from the effective resolution to give the noise-free code resolution. As shown in this example, 19.3 bits of effective resolution is calculated to be equivalent to 16.6 bits of noise-free code resolution. This result is approximately 0.3 bits different from the AD7176-2 specification of 17.2 noise-free bits at an output data rate of 250 kSPS with an unbuffered short-circuit input. This is because this example only uses ±10 V as the full-scale range, rather than the maximum value of ±12.5 V.

Figure 4 shows the integral nonlinearity of the system obtained using the endpoint method, expressed in ppm of full-scale range (FSR).

Although this circuit is primarily designed to handle DC input signals, it is also capable of converting low frequency AC input signals. Its distortion performance changes as the analog input amplitude changes. Figures 5 and 6 show performance for −1 dBFS and −6 dBFS, respectively, and a 1 kHz sine wave. The sine wave generated by the Audio Precision 2700 series audio source is directly input to the AD8475.

For optimal high-resolution system performance, excellent printed circuit board (PCB) layout, grounding, and decoupling techniques are essential. For detailed information, please refer to Tutorial MT-031 , Tutorial MT-101 , AD8475 data sheet, and AD7176-2 data sheet. To view the complete schematic and printed circuit board layout, see the CN-0310 Design Support Package .