The circuit shown in Figure 1 is a complete HDMI/DVI to VGA (HDMI2VGA) conversion solution with analog audio output. It uses the ADV7611 low-power, high-definition multimedia interface (HDMI) receiver that can receive video streams up to 165 MHz. The circuit is powered by a USB cable and operates at a maximum resolution of 1600 × 1200 (60 Hz).

The circuitry uses Extended Display Identification Data (EDID) content to ensure that the video stream from HDMI/DVI reaches the highest resolution supported by the HDMI source, converter, and Video Graphics Adapter (VGA) display.

HDMI receivers can also be used to adjust video, such as brightness or contrast; audio codecs can be used to set the volume of the audio output.

This circuit has many advantages. The highly integrated video receiver regulates video without the need for additional field-programmable gate arrays (FPGAs). Easily adjust brightness, contrast or change audio volume via I2C writes ^. Built-in EDID memory reduces component count and board area. A buck switching regulator allows the USB port to power the circuit. Using industry-standard inter-chip connections, receivers, codecs and video digital-to-analog converters (DACs) are directly interconnected. The circuit uses a 2-layer printed circuit board (PCB) and is capable of operating at resolutions up to UXGA (1600 × 1200 at 60 Hz).

The ADV7611 provides a receive solution for HDMI input and features 5 V cable detection, hot plug detection line assertion, and DDC lines for EDID. Integrates an internal EDID RAM to display HDMI sources. The built-in color space converter (CSC) in this circuit can convert any HDMI color space to 8-bit RGB444 words, suitable for driving the ADV7125 video DAC input. It involves conversion of the following color spaces: RGB, YCrCb (601 and 709), XVYCC (601 and 709), and other color spaces in the HDMI specification. The ADV7611 also supports all sampling schemes that convert between 444 and 422.

The ADV7125 video DAC converts received digital signals into VGA-compatible analog signals.

Audio processing inside the converter begins with the ADV7611's built-in audio packet extraction module. The device can output almost any HDMI standard; however, the SSM2604 audio codec on the backend only accepts I ² S data streams sampled at 44.1 kHz or 48 kHz with Linear Pulse Code Modulation (LPCM). In order to ensure the normal transmission of this I2S data stream, the ADV7611 must provide an HDMI source with appropriate EDID content, and the EDID content must only have LPCM functionality.

The audio line has an output signal impedance of 100Ω and requires an additional power amplifier stage to connect headphones or speakers.

The circuit is controlled using an ADuC7020 microcontroller. The ADuC7020 uses the I ² C SDA and SCL lines, connected through the ADG736 , and switched to either the VGA Display Data Channel (DDC) line or the main I ² C bus. This switch isolates the main I2C ^bus from the VGA I2C DDC line to reduce the risk of any potential conflicts (in case the monitor shares the DDC I2C with other devices, or the VGADDC line fails). The master I ² C bus contains the ADV7611 and SSM2604 I ² C slave devices.

The ADuC7020 also has a universal asynchronous receiver-transmitter (UART) line. They are used in conjunction with the serial programming button (connected to P0.0) and the reset button to program the on-chip flash memory via an executable file. When functioning properly, the UART interface can also be used for debug output or terminal during software development. It requires an additional level converter (such as ADM3202 ) to connect to the computer through the RS232 standard interface. The ADuC7020 is simultaneously connected to the INT1 and RESET pins of the ADV7611 and the PSAVE pin of the ADV7125 for video DAC control.

The board uses two ADP2301 step-down switching regulators to power the board from a 5 V USB supply. This high-efficiency regulator provides 3.3 V and 1.8 V power to the devices on the board.

Initialize the board

When the board is first powered up, it reads the VGA EDID back from the monitor, programs the ADV7611 to receive the HDMI stream, and programs the SSM2604 so that I2S ^audio can be output through the DAC.

Set EDID content

The HDMI2VGA converter ensures that the correct video standard supported by the video display can be sent over the HDMI link. The HDMI specification requires an HDMI source to check for supported HDMI sink video modes before sending a video stream. Once the HDMI source reads the EDID content, it can only choose the standard supported by the video display, ideally the standard that is best suited for that display. Therefore, to ensure that the monitor supports output video, the EDID content is very important.

Audio standards are treated similarly. The EDID content also lists the audio standards supported by the HDMI receiver. The audio stream sent by the HDMI source must match one of the standards listed in the EDID content.

The ADuC7020 is used to read VGA content to determine the monitor's capabilities. The VGA EDID of a typical monitor does not list audio capabilities and may contain video resolutions that are not supported by the ADV7611 (such as pixel rates exceeding 165 MHz and 1920 × 1200 VESA at 60 Hz).

Therefore, it is important to ensure that the EDID content sent to the HDMI source only contains video modes commonly supported by the ADV7611 and VGA displays.

Prepare EDID for ADV7611

The initial source of EDID information recently sent to the HDMI source contains the read and changed EDID from the VGA monitor. Once read, the VGA EDID copies the following bytes to the internal ADuC7020 RAM for changes. Once the changes are made, they are provided to the HDMI source (via the ADV7611 internal EDID).

• Bytes[0:19], header information
• Bytes[19:24], basic display information
• Bytes[25:34], color coordinates
• Bytes[35:37], established bitmap settings (all supported by ADV7611)

The 20th byte of the EDID (video input parameter) is modified to 0 to indicate that the HDMI2VGA converter is a digital video input.

Bytes [38:54] of the EDID contain standard timing information. To ensure that none of the listed modes exceeds the maximum pixel clock frequency of 165 MHz, each mode listed in the STD Timing Information module calculates the pixel clock frequency using the following formula:

The equation above estimates the minimum pixel frequency that must be used to transmit video. This estimate is based on the assumption that the video contains only one horizontal sync pulse, that the pulse width is only one pixel value per line, and that the vertical blanking interval (VBI) is only one line per frame. This type of video would not be used in real applications and this estimate is only an approximation. To get an accurate PCLK value, look for a table based on the actual VESA standard.

If the calculated PCLK frequency exceeds 165 MHz, EDID gives up using the video mode.

The next part of the EDID (bytes [54:125]) is occupied by 4 descriptor modules ([54:71], [72:89], [90:107] and [108:125]). The application checks all 4 descriptor modules and identifies two types of descriptors:

• Detailed timing descriptor (at least one of the first two bytes is non-zero) for pixel clock frequency
• Monitor range descriptor (the first two bytes are zero and the fourth byte is equal to 253) for the maximum pixel clock frequency supported by the monitor

The Detailed Timing Descriptor (DTD) represents the monitor's native video timing. The first two bytes contain the pixel clock frequency value. Above 165 MHz, the entire descriptor is replaced by a DTD module suitable for 640 x 480 (60 Hz) video mode.

The monitor range descriptor contains information about the highest PCLK frequency that the monitor can handle. If it exceeds 165 MHz, set it equal to 165 MHz.

The final module of standard EDID contains two bytes.

• The 126th byte gives the number of additional EDID modules. The application overwrites this byte with 1 to provide an additional EDID.
• The 127th byte is the checksum byte.

The additional EDID module (CEA-861 type) is 128 bytes long and contains audio capabilities and description information supporting the video standard of 640 x 480 pixels. The main purpose of this module is to provide audio capability information for HDMI sources: Stereo LPCM with front left and right speakers, 44.1 kHz, 48 kHz and 32kHz. The CEA-861 module also contains additional information on supported video standards, such as YCbCr444 and YCbCr422, as well as standard RGB.

For more information, please refer to the C source code in the design support file: http://www.analog.com/en/CN0282-DesignSupport

Detection of HDMI sources and VGA displays

The 5 V signal from the HDMI cable signal tells the VGA monitor the input video. The ADuC7020 does not detect the VGA connection and assumes that the connection exists. Monitor detection can be accomplished by reading back the EDID contents. If there is no I ² C reply, it is assumed that the monitor is not connected.

No need to detect HDMI source. Once the ADV7611 is programmed to receive HDMI content, it works every time the cable is connected or the input video standard changes. When the cable is disconnected, the HDMI receiver generates a blue screen at the last received video resolution.

The detection of HDMI source is completed by ADV7611. The connection status can be determined by reading back register 0x6F in the IO map (device address 0x98). See Hardware User Guide (UG-180)

HDMI2VGA converter limitations

The protection of data content needs to be considered. The standard VGA signal is an unencrypted video signal that can be recorded and played back using an analog recorder without any content protection mechanism. Therefore, VGA video is not safe for copyrighted content. Because the HDMI to VGA converter does not support content protection for original copyrighted video streams, it should not be allowed to receive this content.

ADV7611 solves this problem. It released two chip versions: ADV7611 and ADV7611-P. ADV7611 supports decryption of encrypted content, while ADV7611-P does not have this function, it can only receive unencrypted video content. HDMI2VGA converter must use ADV7611-P

The circuit shown in Figure 1 can be modified to receive encrypted content within an existing VGA monitor, as long as the modification does not allow easy access to the decrypted video stream.

Layout considerations

Careful routing between the ADV7611BSWZ-P and ADV7125BCPZ allows this circuit to be built on a 2-layer circuit board. The board has been proven to stream video at 165MHz pixel clock frequency. The bottom layer of the PCB is mainly a physical ground layer, and some lines are connected to the bottom layer. Many vias connect the top and bottom ground planes to reduce ground bounce caused by the transient characteristics of the circuit board current under high-speed signals. Figure 2 is a top view of the PCB. For complete schematics, bill of materials (BOM) and layout details, please refer to the design support file: http://www.analog.com/zh/CN0282-DesignSupport

Assessment and testing

The circuit was tested using the following HDMI source:

• DVD-S97 DVD/CD player (640 × 480p)
• Dell E6520 Laptop (1280 × 1024 or 1600 × 1200 VGA monitor resolution)
• Blu-ray Panasonic DMP-BDT100 (640 × 480p)
• Quantum Data 882 video generator (UXGA 1600 × 1200, 60Hz, 8 bpp)

The circuit was tested using the following VGA monitor:

• Dell 1908FP (maximum resolution: 1280 × 1024 at 60 Hz)
• Dell 2007FP (at 60 Hz, maximum resolution: 1600 × 1200)
• Sun Microsystems GDM-5010PT Monitor

During board evaluation, use the UART connector EVAL-ADuC-CABLE1Z to display the evaluation board's programming information, debugging information, and the EDID content of the VGA monitor. EVAL-ADuC-CABLE1Z is an RS-232 level converter that allows interface between LVTTL and RS-232 logic levels.

The test requires connecting the cables shown in Figure 3 (VGA, HDMI, audio out, and USB) and pressing the reset button.

Consumer video players (DVD or Blu-ray) generally do not support VESA video resolutions such as XGA, SXGA or UXGA. During testing, these sources output standard VGA.

The Dell E6520 laptop can be used as a video source, it natively supports the VESA standard and correctly reads back content provided by the HDMI2VGA converter. It outputs 1280 × 1024/60 Hz to a Dell 1908FP monitor, or 1600 × 1200/60 Hz to a Dell 2007FP monitor.

Both video players can provide LPCM audio content for EDID and can decode and output data from the audio codec normally.