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Xilinx® Zynq®7000 Series (XC7Z015) Power Solution (5W) - Reference Design

PMP10600

Overview

This PMP10600.1 reference design provides all the power rails required to power the Xilinx® Zynq® 7000 Series (XC7Z015) FPGA. This design uses multiple LMZ3 series modules, multiple LDOs, and a DDR termination regulator. It also has an LM3880 for power-up and power-down sequencing. This design uses a 12V input voltage.

characteristic

● Provides all power rails required for Xilinx® Zynq® 7000 Series (XC7Z015)
●The design has been optimized to support 12V input
● Onboard power-on and power-off sequencing
●Support DDR3 storage devices
● Modular design, easy to use

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Design Files

Documentation

PMP10600 Test Results

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It is your responsibility to test the circuit yourself and determine its suitability for you. EEWorld will not be liable for direct, indirect, special, incidental, consequential or punitive damages arising from any cause or anything connected to any reference design used.

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Update:2025-06-26 23:43:20

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