Lemontree

Dual DAC module (inverted T network) suitable for FPGA

 
Overview

Video display

B station video  B station video portal (click me!!)

Physical display

                             (front back)

Instructions for use

The left and right sides are signal inputs, with 11 pins on each side. The bottom is the ground wire. The weight increases from bottom to top.

The power supply is provided below and only requires 5V and GND.

The upper part is the analog output, and out1 and out2 correspond to the left and right pin headers respectively.

Hardware circuit design

Schematic diagram, PCB diagram, simulation diagram, 2D model, 3D model

 

         See the Lichuang EDA editor below for details.

 

 

Connect to FPGA for use

For the convenience of testing, directly use the schematic diagram to develop

The development board is Wildfire Journey Mini, chip model EP4CE10F17C8, with an onboard 50M crystal oscillator, which is used through PLL frequency division.

Schematic diagram

The line with XX above can be directly connected to the clock input to facilitate changing the clock frequency.

The PLL is responsible for generating the signal with the required frequency

Counter is used for cumulative counting, 8 bits wide, range 0-255

MyROM is the initialized memory (10bit wide data, 8bit address), which stores the .mif initialization file (sin signal)

 

Use Quartus's own simulation tools for simulation

 

 

For computer verification, please refer to the sin signal test below.

 

 

DC performance test

The test method is as shown in (Figure 3). Give 3.3V voltage at 1 point, and then read the voltage at 2 points. VBUS voltage is 5.09V

 

 

Simulated performance testing

Using Wildfire Journey development board, chip EP4CE10F17C8

The oscilloscope is the Punctual Atomic DS100

The test pictures are as follows:

sin signal

The critical value is about 40kHz, and significant waveform distortion occurs after exceeding it.

      

 

 

Square wave signal:

Green is the input square wave, yellow is the output. After the rising edge of the input signal, the output takes about 6us to reach the peak (1us hysteresis + 5us rise)

     

 

cost statistics

The last four materials do not need to be welded and will not affect use. The cost of a single set is less than 1 yuan

materials

price

Remark

1k 50 only 0603 1%

0.8 yuan

Need 24

2k 50 only 0603 1%

0.8 yuan

Need 24

LM324 op amp

0.15 yuan

Need 1

LED 0603

--

Need 1

Current limiting resistor 10k

--

Need 1

KMA1117-3.3v

--

Need 1

filter capacitor

--

Need 2

 

Appendix 1: Special design:

What if one of the amplifiers in the chip burns out?

Just remove the chip and solder it in the reverse direction (flip the x-axis)! (LM324 integrates 4 amplifiers, only 2 are used here) (doge

Appendix 2: Attachment description:

The attachment is the Quartus project mentioned in the article.

 

 

 

If you have any comments or suggestions, please feel free to poke  Pingyun’s little nest at Station B.

 

参考设计图片
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Update:2025-06-02 06:06:38

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