The PCB design by this author has been modified and the circuit optimized.
Firmware address: https://github.com/XIVN1987/DAPLink.
The programmer with the ch32v203 main controller supports 3.3V-5V output switching. In addition to DAPLink downloading, it supports serial port (UART) downloading and debugging. The RXD pin is already pulled up in the software; if a hardware pull-up is required, solder resistor R14. If no pull-up is needed, soldering is not necessary (in most cases, it works without soldering). Through processing of the TXD and RXD pins, it can adapt to all serial port downloaders on the market, enabling button-controlled downloading (after clicking download in the software, pressing the button will start the download), facilitating debugging.
The CH224K decoy board supports PD3.0/2.0, BC1.2 and other boost fast charging protocols.
Unauthorized commercial use is prohibited! If I catch you, I'll make sure you're haunted by nightmares, you'll be in big trouble!
CH224K Decoy Board


[Feel free to comment or message me with any questions about open source]
Function Introduction:
Interface: TYPE-C 16P female connector →→→ Large area soldering pads
Range: Maximum requested voltage level PD20V
Onboard Chip: CH224K
Requested Voltage Levels: Supports PD3.0/2.0, BC1.2 and other boost fast charging protocols 9V 12V 15V 20V
How to Use: You need at least one charger that supports the PD protocol. Ensure the voltage selection resistor value is correct. Plug the charger's TYPE-C data cable into the decoy board's TYPE-C female connector. Then, CH224K will communicate with the charger via protocol. After a successful handshake, the VBUS pad will have the corresponding voltage level.
Update Log:
Project successfully verified.
Open source project released on 2023/5/9.
Notes on 2024/4/19:
6.8K=9V, 24K=12V, 56K=15V, NC=20V. The voltage level selection method uses single resistor configuration.
To ensure the PCB's current carrying capacity, I flattened the positioning posts of the [Component TYPE-C Female Socket], which prevents the VBUS traces from being blocked by the slots, resulting in a larger copper foil area.
The PCB is a 4-layer board. With a 2-layer board, the GND return path is too thin; it can't pass through the top layer, and the bottom layer only has a tiny bit. Fortunately, it's a 4-layer board, with the inner 1 and inner 2 layers all used as GND to ensure sufficient GND return area.
Since I didn't adjust or modify the BOM, some components in the BOM directly generated by JLCPCB EDA may not match. It's best to carefully check the component names and values on the schematic and PCB before purchasing.
The datasheet for the CH224K chip is included in the attachments on the open-source page. The image shows
the TYPE-C female connector with its flattened positioning
posts (circled in red).
The component soldering details are also included.

