A replica of a dual-channel oscilloscope based on the STM32H750VBT6.

The I/O allocation in this project only applies to the Hardwood Classroom H750 core board. Please refer to the schematic diagram for specific allocation details.  
The above is a 3D simulation diagram.
 
The physical diagram is shown below.
The software code is in the attachment of the Hardwood Classroom official website! Implementation of the
signal
conditioning circuit:
Below, we will briefly introduce the analog input and output channels on the AFE03 board. We will then introduce the design and calculation methods in detail later.
Analog input channel introduction:
This includes signal conditioning implemented with resistor voltage dividers and operational amplifiers, and a square wave output implemented with a comparator (for triggering and frequency measurement).
INA, INB: The input terminals of the oscilloscope. The pocket instrument sends an analog signal and connects to this point. Here, a 1MΩ input impedance is achieved through a series resistor voltage divider, generating two signals for selection: one is a direct input, and the other is attenuated to 1/20.
Gain: A selector switch that chooses either a direct signal or a signal attenuated to 1/20th of its input to the first-stage non-inverting amplifier. The non-inverting amplifier performs two functions: first, it amplifies the input signal at the non-inverting input by a factor of two; second, it shifts the amplified signal by 1.65V, calculated as Vo = 1.65 + 2*Vi. Therefore, the overall gain of the circuit is either 2 or 1/10.
AnalogA, AnalogB: The amplified and shifted analog signals from the non-inverting amplifier are connected to the STM32H750 development board and enter the H750's ADC.
TrigerA, TrigerB: The square wave signals generated by AnalogA, AnalogB, and the DC reference level (generated by one of the H750's DACs) after passing through a comparator, enter the STM32H750's timer for frequency measurement.
DAC_OUT2: The DC reference level, output through the STM32H750's internal DAC2 configuration.
 
Analog output channel introduction:
This includes signal conditioning implemented with resistor voltage dividers and operational amplifiers, and a square wave output implemented with a comparator (for triggering and frequency measurement).
The STM32H750's DAC1 output ranges from 0-3.3V.
A second-order RC filter implements a low-pass filter function.
A resistor voltage divider and buffer convert the 5V input to a low-impedance 2V output, which is then amplified by -5 times for signal shifting.
The output amplifier performs two functions: first, it amplifies the non-inverting input by 6 times; second, it shifts the amplified signal by 6 times by -10V before outputting it, calculated as Vo = -10 + 6 * Vi.
A voltage divider network is used to achieve better results when outputting small signals using analog circuit voltage division.
 
 
Below, we will detail the calculations for the analog circuit:
Analog input channel calculation:
This section requires a basic understanding of operational amplifiers.
First, we need to recognize that when the VREF of the STM32H750 is powered by 3.3V, the input range of the STM32's ADC is 0-3.3V, while our input signal has a maximum range of ±15V. Therefore, we need to solve the problem of large signal input not being saturated. Let's solve an equation:
15*a+b = 3.3
-15*a+b = 0,
which gives a=0.11 and b=1.65.
This means we need to attenuate the input signal to at least 0.11 times (approximately 1/9) and add 1.65V DC to meet the full-scale input of the ADC. Therefore, we use the following operational amplifier circuit. The resistor network achieves 1/20 attenuation, and the operational amplifier performs a 2x amplification and a 1.65V voltage shift, thus achieving 0.1INB + 1.65V.
We can use the superposition theorem to analyze this circuit. First, when analyzing the contribution of the input signal INB to the output Vo, we ground the other voltage source in the circuit, -1.65V. This way, the input signal is divided to 1/20 after passing through R14 and R18, and then amplified by a factor of 2 by the non-inverting amplifier circuit. The overall gain of the input signal is 1/10. When analyzing the contribution of -1.65V to the output, we ground the input signal AIN, and the amplification factor of -1.65V is -1. Therefore, we obtain the output Vo = -1.65V * (-1) + AIN/10 = 1.65V + AIN/10.
 
The -1.65V above is obtained from -12V through a resistor divider and buffer.
This circuit solves the problem of matching the ±15V input to the ADC's 0-3.3V input range. We also need to consider accurate sampling even with small input signals. For example, a 10mV signal will attenuate to 1mV after passing through this circuit. To maximize the signal-to-noise ratio of the input signal, we add a switching mode to the analog front-end. When acquiring small signals, the switch selects the direct input of INB to the non-inverting input of the op-amp, instead of selecting the attenuated signal from INB. This ensures the signal entering the ADC is as large as possible. Combined with a 16-bit ADC, this ensures accurate and reliable sampling results.
As shown in the diagram, we add a signal switch (relay or manual switch) after the 1M ohm input voltage divider resistor to select whether INB enters the op-amp's non-inverting input directly or after being divided by 1/20. Both methods result in a 1M ohm input impedance for INB. When we need to acquire small signals, we can toggle the switch to use the direct input for more accurate measurement results.
We can calculate that when the direct input is selected, Vo = 2AIN + 1.65, and when the attenuation input is selected, Vo = AIN/10 + 1.65.
 
Analog output channel calculation:
When the VREF of the STM32H750 is powered by 3.3V, the output range of the internal DAC is 0-3.3V. To achieve the ±10V output required in the problem, we need to solve the following equations:
0*a + b = -10V
3.3*a + b =
Solving for 10V , we get a=6.06 and b=-10
, which allows us to design the following circuit:
In the diagram above, the 0-3.3V signal output from the STM32H750's internal DAC is filtered by a low-pass filter and then input to the non-inverting input of the TL082, forming a non-inverting amplifier with a gain of 6. The amplified waveform is 0-19.8V. Then, utilizing the -5x amplification capability of the TL082's inverting amplifier section, we amplify the +2V obtained from the 5V voltage divider to -10V, and superimpose this -10V with the 0-19.8V signal from the non-inverting amplifier to obtain an output of approximately ±10V. The calculation formula is: Vout = 6*Vin -10.
Similar to ADCs, the resolution of a DAC is crucial for achieving a signal source output covering ±10mV to ±10V while balancing a large signal range and small signal precision. The H750's DAC is 12-bit, with a full-scale output (using all 4096 code values) of ±10V. When reducing the DAC code value to output a small signal, to achieve a 7-bit voltage resolution (128 vertical points), the waveform must be attenuated by 128/4096 = 1/32. This translates to an output voltage range of ±10V/32 = ±0.3215V. For signals smaller than ±0.3125V, further reducing the code value results in insufficient DAC resolution, leading to noticeable waveform steps. Therefore, we use analog voltage division. When outputting signals smaller than ±0.3125V, a switching resistor divider attenuates the waveform by 1/20, ensuring sufficient voltage resolution for small signals. Meanwhile, the combination of R57 and R62 makes the output resistance of the circuit 50Ω at 1/20 attenuation, and R5 makes the output resistance of the circuit 50Ω at x1.
 
 
Comparator circuit:
To implement the trigger function and frequency counter function, we designed two comparator channels on the board to convert the waveforms of the two analog input channels before entering the ADC into square wave signals for use as timer inputs of H750. The reason for using the waveforms before entering the ADC for comparison is that the waveforms entering the ADC have been conditioned by the front-end analog circuit and have fallen within the known 0-3.3V range, making the comparison threshold of the comparator easier to design.
As shown in the figure above, H750 uses the internal DAC2 to output a 0-3.3V DC to compare with the waveform of channel 2 before entering the ADC, converting the waveform of channel 2 into a square wave. In this way, the timer function of H750 can use the square wave signal for interrupt processing and timer capture processing.
 
This oscilloscope & signal source has two input channels with an input voltage range of ±15V; and one output channel that can output sine waves, triangle waves, and square waves, with adjustable output frequency and amplitude.
The oscilloscope's two input ports meet the following requirements:

±10V dual-channel 2MHz sampling frequency or higher, 20kHz bandwidth. Sine wave peak-to-peak measurement error less than 5%.
Range switching via a knob.
Smooth triggering with no noticeable slippage.
Measurement frequency error no greater than 5%.

 
The signal source output port meets the following requirements:

When outputting ±4V 20kHz square wave, triangle wave, and sine wave, the peak-to-peak error of the waveform is no greater than 15%.

Screen link in the project:
https://item.taobao.com/item.htm?spm=a1z09.2.0.0.493e2e8dDj6cbx&id=721174513880
Thanks to JLCPCB!
Thanks to the experts in the group who answered my questions!
Thanks to Hardwood Classroom!
I learned a lot from replicating this project!
Looking forward to the next training camp!
The revised test video is as follows: