Digital power control advances GaN PFC design

    I recently shared with you the production announcement of TI's new Piccolo™ F28004x microcontroller (MCU) family, which is optimized for power control applications.

    Key features of the Piccolo F28004x for high-performance power control include:

    On-chip window comparator.

    Programmable digital-to-analog converter with slope compensation.

    High-resolution pulse-width modulation (PWM) one-shot and global override functions simplify the implementation of variable-frequency interleaved power converters.

    · Programmable PWM blanking.

    High resolution PWM dead band.

    Tight coupling between on-chip comparator and PWM timer modules.

    Multiple independent high-speed and high-resolution analog-to-digital converters.

    High-performance floating-point CPU with optional parallel control law accelerator.

    Two reference designs—the Interleaved CCM Totem-Pole Bridgeless Power Factor Correction (PFC) Reference Design and the High-Efficiency, 1.6kW High-Density GaN-Based 1MHz CRM Totem-Pole PFC Converter Reference Design—demonstrate the benefits of these features in real-world systems. These designs are totem-pole power factor correction (PFC) converter references ideal for power supply applications in telecom, server and networking, industrial, and electric vehicle (EV) on-board charging (OBC).

    The reference voltage levels (AC input, 400V DC output) and efficiency (+98.7%) are similar, and they use similar components (600V gate driver and gallium nitride [GaN] power stage) and features (soft start, adaptive dead time, phase shedding) – but there are some key differences in their implementation.

    The interleaved continuous conduction mode (CCM) reference design demonstrates a three-phase interleaved topology (Figure 1) operating in CCM with 100kHz PWM switching. This technique is typically used in applications of 5kW and above that require high efficiency at moderate power density. Due to switching losses, the switching frequency is limited to around 200kHz.

    Figure 1: PFC topology for interleaved continuous conduction mode (CCM) reference design

    The Totem Pole PFC Converter reference design demonstrates a two-phase interleaved topology (Figure 2) with critical conduction mode (CRM) operation at a maximum 1.2MHz PWM frequency. Compared to CCM operation, CRM mode avoids switching losses and achieves consistently high efficiency at higher PWM frequencies. Due to the high frequency, designs can be smaller and denser while maintaining high efficiency.

    Figure 2: PFC topology of the Totem Pole PFC converter reference design

    The primary challenge is achieving zero voltage switching (ZVS) across line and load conditions throughout the entire AC cycle. This becomes difficult when the input voltage increases above half the DC bus voltage, at which point valley switching is limited to zero current fed into the inductor. With valley switching and incomplete ZVS operation, the switching losses of the metal-oxide semiconductor field-effect transistor (MOSFET) increase significantly as the switching frequency increases.

    The solution to extending ZVS operation over the entire AC cycle is to extend the on-time of the synchronous switch, causing a negative current in the inductor, which swings the drain-source voltage toward zero. Figure 3 illustrates the challenge and solution. While simple in theory, implementation across the entire load and operating range is challenging and relies on the capabilities of the Piccolo F28004x real-time controller.

    Figure 3: CRM and CRC (ZVS) technology

    The highly efficient, 1.6kW, high-density GaN-based 1MHz CRM totem-pole PFC converter reference design represents true cutting-edge technology, with implementation and efficiency capabilities exceeding current market offerings for power supply customers. To help you develop similar products, we also provide a suite of software tools to fine-tune the solution. Both reference designs are supported by the DigitalPower Software Development Kit (SDK) for C2000™ MCUs.

    The SDK is a complete set of software infrastructure, tools, and documentation designed to minimize development time for digital power systems based on C2000 MCUs. The software includes firmware that runs on the C2000 Digital Power Evaluation Module (EVM) and reference designs from the TI Design Library, a repository for all digital power applications.

    The DigitalPower SDK includes powerSUITE, a digital power software design toolkit that includes the following components:

    · Solution Adapters: Customize code examples to run on example or custom hardware using the same topology as TI solutions.

    Compensation Designer: Design digital compensators to achieve your desired closed-loop performance.

    Software Frequency Response Analyzer (SFRA): Plots and measures open-loop gain (loop gain Bode plot) and device (power stage) frequency response to evaluate and optimize the stability and robustness of digital power supply control loops, as shown in Figure 4.

    Figure 4: PowerSUITE SFRA tool showing the PFC voltage loop response of the interleaved CCM reference design

    I'm sure if you're a power supply designer, you're ready to get started. Have fun, good luck, and keep an eye out for more TI reference designs for cutting-edge power control.