M36L0T7050T2
M36L0T7050B2
128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory
and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package
Preliminary Data
Feature summary
■
Multi-Chip Package
– 1 die of 128 Mbit (8Mb x16, Multiple Bank,
Multi-level, Burst) Flash Memory
– 1 die of 32 Mbit (2Mb x16) Pseudo SRAM
Supply voltage
– V
DDF
= 1.7 to 1.95V
– V
CCP
= V
DDQ
= 2.7 to 3.1V
– V
PPF
= 9V for fast program
Electronic signature
– Manufacturer Code: 20h
– Device Code (Top Flash Configuration)
M36L0T7050T2: 88C4h
– Device Code (Bottom Flash Configuration)
M36L0T7050B2: 88C5h
ECOPACK® packages available
■
■
FBGA
■
TFBGA88 (ZAQ)
8 x 10mm
■
■
Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked
with zero latency
– WP for Block Lock-Down
– Absolute Write Protection with V
PP
= V
SS
Security
– 64 bit unique device number
– 2112 bit user programmable OTP Cells
Common Flash Interface (CFI)
100,000 program/erase cycles per block
Flash memory
■
Synchronous / Asynchronous Read
– Synchronous Burst Read mode: 52MHz
– Random Access: 85ns
Synchronous Burst Read Suspend
Programming time
– 2.5µs typical Word program time using
Buffer Enhanced Factory Program
command
Memory organization
– Multiple Bank Memory Array: 8 Mbit Banks
– Parameter Blocks (Top or Bottom location)
Dual operations
– program/erase in one Bank while read in
others
– No delay between read and write
operations
■
■
■
■
PSRAM
■
■
■
■
■
■
Access time: 65ns
8-Word Page Access capability: 18ns
Low standby current: 100µA
Deep power down current: 10µA
Compatible with standard LPSRAM
Power-down modes
– Deep Power-Down
– 4 Mbit Partial Array Refresh
– 8 Mbit Partial Array Refresh
■
■
November 2007
Rev 0.2
1/22
www.numonyx.com
1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
Contents
M36L0T7050T2, M36L0T7050B2
Contents
1
2
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
2.20
2.21
Address Inputs (A0-A22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Data Input/Output (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Flash Chip Enable (E
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Flash Output Enable (G
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Flash Write Enable (W
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Flash Write Protect (WP
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Reset (RP
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Latch Enable (L
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Clock (K
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Flash Wait (WAIT
F
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PSRAM Chip Enable Input (E1
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PSRAM Chip Enable Input (E2
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Write Enable (W
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Output Enable (G
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Upper Byte Enable (UB
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PSRAM Lower Byte Enable (LB
P
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
V
DDF
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
V
CCP
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
V
DDQ
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
V
PPF
Program Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
V
SS
Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
5
6
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/22
M36L0T7050T2, M36L0T7050B2
Contents
7
8
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3/22
List of tables
M36L0T7050T2, M36L0T7050B2
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Device Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Package Data . . . . . . 19
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4/22
M36L0T7050T2, M36L0T7050B2
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
TFBGA Connections (Top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AC Measurement I/O Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch,
Bottom View Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5/22
京公网安备 11010802033920号
EEWORLD
