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SN74LVC1G66
SINGLE BILATERAL ANALOG SWITCH
www.ti.com
SCES323K – JUNE 2001 – REVISED NOVEMBER 2005
FEATURES
•
•
•
•
•
•
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
1.65-V to 5.5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 0.8 ns at 3.3 V
High On-Off Output Voltage Ratio
High Degree of Linearity
High Speed, Typically 0.5 ns
(V
CC
= 3 V, C
L
= 50 pF)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
•
•
•
Low On-State Resistance, Typically
≈5.5 Ω
(V
CC
= 4.5 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DRL PACKAGE
(TOP VIEW)
A
B
GND
1
5
V
CC
A
B
1
2
3
5
V
CC
A
B
GND
1
2
3
5
V
CC
C
GND
B
A
3 4
2
1 5
C
V
CC
2
4
GND
4
4
C
3
C
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single analog switch is designed for 1.65-V to 5.5-V V
CC
operation.
ORDERING INFORMATION
T
A
PACKAGE
(1)
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA
(Pb-free)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-553) – DRL
(1)
(2)
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
ORDERABLE PART NUMBER
SN74LVC1G66YEAR
SN74LVC1G66YZAR
Reel of 3000
SN74LVC1G66YEPR
SN74LVC1G66YZPR
SN74LVC1G66DBVR
SN74LVC1G66DBVT
SN74LVC1G66DCKR
SN74LVC1G66DCKT
SN74LVC1G66DRLR
C6_
_ _ _C6_
TOP-SIDE MARKING
(2)
C66_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
•
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2005, Texas Instruments Incorporated
SN74LVC1G66
SINGLE BILATERAL ANALOG SWITCH
SCES323K – JUNE 2001 – REVISED NOVEMBER 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74LVC1G66 can handle both analog and digital signals. The device permits signals with amplitudes of up
to 5.5 V (peak) to be transmitted in either direction.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
FUNCTION TABLE
CONTROL
INPUT
(C)
L
H
SWITCH
OFF
ON
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
4
C
2
B
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
CC
V
I
V
I/O
I
IK
I
IOK
I
T
Supply voltage range
(2)
Input voltage
range
(2) (3)
V
I
< 0
V
I/O
< 0 or V
I/O
> V
CC
V
I/O
< 0 to V
CC
DBV package
DCK package
θ
JA
Package thermal impedance
(5)
DRL package
YEA/YZA package
YEP/YZP package
T
stg
(1)
(2)
(3)
(4)
(5)
Storage temperature range
–65
Switch I/O voltage range
(2) (3) (4)
Control input clamp current
I/O port diode current
On-state switch current
Continuous current through V
CC
or GND
–0.5
–0.5
–0.5
MAX
6.5
6.5
V
CC
+ 0.5
–50
±50
±50
±100
206
252
142
154
132
150
°C
°C/W
UNIT
V
V
V
mA
mA
mA
mA
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7.
2
www.ti.com
SN74LVC1G66
SINGLE BILATERAL ANALOG SWITCH
SCES323K – JUNE 2001 – REVISED NOVEMBER 2005
Recommended Operating Conditions
(1)
MIN
V
CC
V
I/O
Supply voltage
I/O port voltage
V
CC
= 1.65 V to 1.95 V
V
IH
High-level input voltage, control input
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
CC
= 1.65 V to 1.95 V
V
IL
Low-level input voltage, control input
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
I
Control input voltage
V
CC
= 1.65 V to 1.95 V
∆t/∆v
Input transition rise/fall time
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
T
A
(1)
Operating free-air temperature
–40
0
1.65
0
V
CC
×
0.65
V
CC
×
0.7
V
CC
×
0.7
V
CC
×
0.7
V
CC
×
0.35
V
CC
×
0.3
V
CC
×
0.3
V
CC
×
0.3
5.5
20
20
10
10
85
°C
ns/V
V
V
V
MAX
5.5
V
CC
UNIT
V
V
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
I
= V
CC
or GND,
V
C
= V
IH
(see
Figure 1
and
Figure 2)
V
I
= V
CC
or GND,
V
C
= V
IH
(see
Figure 1
and
Figure 2)
V
I
= V
CC
and V
O
= GND or
V
I
= GND and V
O
= V
CC
,
V
C
= V
IL
(see
Figure 3)
V
I
= V
CC
or GND, V
C
= V
IH
, V
O
= Open
(see
Figure 4)
V
C
= V
CC
or GND
V
C
= V
CC
or GND
V
C
= V
CC
– 0.6 V
I
S
= 4 mA
I
S
= 8 mA
I
S
= 24 mA
I
S
= 32 mA
I
S
= 4 mA
I
S
= 8 mA
I
S
= 24 mA
I
S
= 32 mA
V
CC
1.65 V
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
5.5 V
MIN TYP
(1)
12
9
7.5
5.5
74.5
20
11.5
7.5
MAX
30
20
15
10
120
30
20
15
±1
±0.1
(1)
±1
±0.1
(1)
±1
±0.1
(1)
10
1
(1)
500
2
6
13
µA
µA
µA
µA
µA
pF
pF
pF
Ω
Ω
UNIT
r
on
On-state switch resistance
r
on(p)
Peak on resistance
I
S(off)
Off-state switch leakage
current
On-state switch leakage
current
Control input current
Supply current
Supply current change
Control input capacitance
Switch input/output
capacitance
Switch input/output
capacitance
I
S(on)
I
I
I
CC
∆I
CC
C
ic
C
io(off)
C
io(on)
(1)
5.5 V
5.5 V
5.5 V
5.5 V
5V
5V
5V
T
A
= 25°C
3
SN74LVC1G66
SINGLE BILATERAL ANALOG SWITCH
SCES323K – JUNE 2001 – REVISED NOVEMBER 2005
www.ti.com
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see
Figure 5)
PARAMETER
t
pd
t
dis
(1)
(2)
(3)
(1)
FROM
(INPUT)
A or B
C
C
TO
(OUTPUT)
B or A
A or B
A or B
V
CC
= 1.8 V
±
0.15 V
MIN
2.5
2.2
MAX
2
12
10
V
CC
= 2.5 V
±
0.2 V
MIN
1.9
1.4
MAX
1.2
6.5
6.9
V
CC
= 3.3 V
±
0.3 V
MIN
1.8
2
MAX
0.8
5
6.5
V
CC
= 5 V
±
0.5 V
MIN MAX
0.6
1.5
1.4
4.2
5
UNIT
ns
ns
ns
t
en (2)
(3)
t
PLH
and t
PHL
are the same as t
pd
. The propagation delay is the calculated RC time constant of the typical on-state resistance of the
switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
t
PZL
and t
PZH
are the same as t
en
.
t
PLZ
and t
PHZ
are the same as t
dis
.
Analog Switch Characteristics
T
A
= 25°C
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
C
L
= 50 pF, R
L
= 600
Ω,
f
in
= sine wave
(see
Figure 6)
Frequency response
(1)
(switch ON)
A or B
B or A
C
L
= 5 pF, R
L
= 50
Ω,
f
in
= sine wave
(see
Figure 6)
V
CC
1.65 V
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
1.65 V
Crosstalk
(control input to signal output)
C
A or B
C
L
= 50 pF, R
L
= 600
Ω,
f
in
= 1 MHz (square wave)
(see
Figure 7)
2.3 V
3V
4.5 V
1.65 V
C
L
= 50 pF, R
L
= 600
Ω,
f
in
= 1 MHz (sine wave)
(see
Figure 8)
Feedthrough attenuation
(2)
(switch OFF)
A or B
B or A
C
L
= 5 pF, R
L
= 50
Ω,
f
in
= 1 MHz (sine wave)
(see
Figure 8)
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
1.65 V
C
L
= 50 pF, R
L
= 10 kΩ,
f
in
= 1 kHz (sine wave)
(see
Figure 9)
Sine-wave distortion
A or B
B or A
C
L
= 50 pF, R
L
= 10 kΩ,
f
in
= 10 kHz (sine wave)
(see
Figure 9)
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
(1)
(2)
Adjust f
in
voltage to obtain 0 dBm at output. Increase f
in
frequency until dB meter reads –3 dB.
Adjust f
in
voltage to obtain 0 dBm at input.
TYP
35
120
175
195
>300
>300
>300
>300
35
50
70
100
–58
–58
–58
–58
–42
–42
–42
–42
0.1
0.025
0.015
0.01
0.15
0.025
0.015
0.01
%
dB
mV
MHz
UNIT
4