• You can log in to your eeworld account to continue watching:
  • SDK Bare Metal Development—ADC Ethernet Transmission Protocol
  • Login
  • Duration:7 minutes and 47 seconds
  • Date:2024/12/16
  • Uploader:Lemontree
Introduction
keywords: FPGA
This set of video tutorials is an original video tutorial by ALINX based on Xilinx Zynq UltraScale+ MPSoC series FPGA. The content includes five parts: bare metal development, Linux basic development, Linux driver development, Vitis HLS development, and Vitis AI development. It details the development content of each part of the MPSoc series FPGA chip. The video is based on the FPGA development board independently designed by ALINX. It combines theory with practice so that everyone can fully understand the development ideas. At the same time, it is close to the project and demonstrates mainstream technologies, such as the application of artificial intelligence AI, vehicle recognition, pedestrian detection, PCB defect detection, construction site safety helmet detection, flame detection, office target recognition, thermal imaging ADAS vehicle detection, concrete defect detection, etc., giving full play to the flexibility, high performance, low latency, high reliability and other characteristics of the MPSoc series FPGA chips.
Unfold ↓

You Might Like

Recommended Posts

Why is it that the interrupt service routine is not allowed to have a return value? Please give me some advice, thank you.
I have seen many questions that ask you to find errors in an interrupt service program with a return value. The answer is: Interrupt service programs are not allowed to have return values. Interrupt s
neckfully Embedded System
After voltage stabilization, it will heat up after working for a long time
I made a 220v 5v stabilizer, using a 12v transformer and then connected to a 78M05 to stabilize it to 5v, but after a long time, the transformer will get hot, and then the power will not be enough. It
askahaha Embedded System
(Help) Question about capacitor selection?
As shown in the figure, what is the specific function of the capacitor marked in red? This figure is a mic circuit in an IP phone. How to determine its capacitance?
kingyb Discrete Device
TI group-purchased chip DIY - Part 1: ADS8332
[i=s]This post was last edited by dontium on 2015-1-23 13:02[/i]I bought the chip from a group purchase, and I was itching to make one. Later, I printed a PCB. For details, see: bbs.eeworld../thread-3
dontium Analogue and Mixed Signal
The high level output of Mega8 IO port is about 1.5V, and the low level output is about 0.3V. Please discuss it together.
[i=s] This post was last edited by huanjun123 on 2014-11-6 15:19 [/i] I made a minimum system based on mega8. When testing, the IO port high-level output was about 1.5V and the low-level output was ab
huanjun123 Microchip MCU
fpga phase locked loop demodulation FM
Someone previously posted a document (vhdl) about FPGA phase-locked loops from the Japanese FPGA competition. I referred to it, changed it to Verilog, and used ModelSim to give the same simulation res
路人甲1 FPGA/CPLD

Recommended Content

可能感兴趣器件

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号