Previously, DPS (device power supply) solutions were designed with discrete amplifiers, switches, DACs, resistors, etc. As silicon process innovations and chips continue to shrink, highly integrated solutions are now possible, but integrating all devices onto a single silicon wafer is nearly impossible. Although the AD5560 DPS is a highly integrated device, several external components still need to be carefully selected to provide a complete system solution. The purpose of this circuit note is to detail which components are required and why they were chosen to provide a more complete device power solution.

This product is mainly used as a power supply for driving the device under test (DUT) in automatic test equipment (ATE). Therefore, there are many different requirements for this DPS, including voltage and current specifications (depending on the type of device under test it drives), as well as stability, accuracy, and other factors.

As a device power supply, the AD5560 must be able to provide the voltage and current required by the device under test in a timely manner.

Subject to the maximum allowable voltage |AVDD − AVSS| ≤ 33 V, the AD5560 can achieve a 25 V peak-to-peak voltage span from −22 V to +25 V.

In addition, the AD5560 provides a current range up to ±1.2 A. Note that the 1.2 A current cannot be supplied at higher output voltages due to the power dissipation limitations of the package.

The 1.2 A output capability is primarily intended for powering low voltage rails no greater than 3.5 V. Therefore, when reviewing voltage and current requirements, there are many factors to consider, such as: headroom, footroom, worst-case power consumption, supply rails, thermal performance, etc.

This circuit is designed to provide three supply rails to the device under test:

The components and configuration selected for this circuit will be specifically tailored to the above combinations.

For other uses of this product or more detailed information, please refer to the AD5560 data sheet .

The AD5560 DPS provides the supply voltages and measurement capabilities required by the device under test, but to complete the circuit, several additional components are required: a voltage reference; an ADC to digitize the measurements; and a temperature monitor , used to measure the temperature of the internal detection diode so that the user can view the temperature gradient on the chip or PC board.

The ADC is used to digitize the measurement output. Depending on the reference voltage and OFFSET DAC settings, the measurement output (MEASOUT pin) can provide different output ranges.

Using the OFFSET DAC, the forced voltage output range can be offset to achieve different output ranges. The specific output range that this article focuses on is 0 V to 25 V. Therefore, the default MEASOUT output range (MEASOUT GAIN = 1) will also be 0 V to 25 V. No ADC can handle this output range directly, so some external signal conditioning is required to match the range to the input range of a unipolar or bipolar ADC.

MEASOUT also has a setting (MEASOUT GAIN = 0.2) that adjusts the MEASOUT output range to offset 0 V to 5.125 V. (It is slightly over-range and can be used for calibration, etc.)

For this example, we will use the 0 V to 5.125 V range so that we can easily use a unipolar input ADC.

The AD7685, 16-bit, 250 kSPS ADC is capable of handling the 0 V to 5 V output range on the MEASOUT path, making it suitable for this application. Additionally, if an upgrade path is desired, other faster ADCs of the same size, such as the 500 kSPS AD7686 , are also attractive options.

ADC considerations

Each DPS channel can have a dedicated ADC to provide the fastest throughput rate, or multiple channels can share a single ADC. In many typical applications, 8 or 16 channels share a single ADC.

Using the internal disable function of each MEASOUT pin, multiple channels can share one ADC. This requires a write command to the DPS register to enable/disable the corresponding switch. If you choose this method, you should note that only one MEASOUT can be selected at a time.

Alternatively, an external 4:1 or 8:1 multiplexer can be used to control measurement channel selection. In this way, all MEASOUT paths can be enabled and the measurement channel selected by the multiplexer. Similarly, using a 16:1 multiplexer allows more measurement paths to share one ADC. The choice of multiplexer will depend on the ADC used and its input voltage range. (For a bipolar input ADC, the ADG1404 / ADG1204 would be ideal; if using a single supply, the ADG706 or ADG708 would be more suitable.) The output impedance of the MEASOUT path is typically 60 Ω; in addition to the switch impedance, you should consider using a ADC buffer to drive the ADC (for example, the op amp ADA4898-1 is a suitable choice).

reference voltage source

Since a 25 V output voltage range is required, the 5 V X-FET reference ADR435 was selected . This reference has excellent temperature drift performance and low noise, and is capable of driving multiple PMU channels.

temperature monitor

The AD5560 has an array of 16 temperature monitoring diodes located at different points on the chip. These diodes must be driven with current to produce a voltage that indicates the temperature of the corresponding area of ​​the chip. With so many temperature diodes on a chip, users can measure the temperature gradient of the chip or board under specific conditions. For this purpose, ON Semiconductor's temperature monitor ADT7461A was selected to interface with the on-chip temperature diode. Since each diode in this example is connected to the GPO pin of the AD5560 through a multiplexer, the series resistance cancellation feature of the ADT7461A is important. Without series resistance cancellation, the multiplexer's on-resistance would create measurement errors. Please note that the ADT7461A has a two-wire interface.

Compensation and feedforward capacitors

As a device power supply, the AD5560 may face various capacitive loads depending on the bypass and decoupling requirements of the device under test. This circuit is designed to handle capacitive loads from 0 μF to 160 μF. For optimal stability of the internal compensation algorithm and settling into this load range, external capacitors are required as shown in Table 1.

Although there are 4 compensation input pins (C _CX ) and 5 feedforward capacitor input pins (C _FX ), the user only needs to use all capacitive inputs when the load capacitance of the device under test changes significantly. If the load capacitance of the device under test is known and does not vary with different combinations of voltage range and test conditions, then only a set of C _CX and C _FX capacitors can be used. For details on the compensation algorithm, refer to the AD5560 data sheet.

The voltage range of the C _CX and C _FX pins is the same as the expected voltage range on FORCE; therefore, this should be considered when selecting capacitors. The C _FX capacitor can have a 10% tolerance, especially when measuring current in the low current range, and this additional variable directly affects settling time. The tolerance of C _{CX should not be greater than 5%.}

Output voltage range

The output voltage range of this design circuit is as follows:

To configure these rail combinations, we need to adjust the OFFSET DAC settings. The recommended value is 0xD1D, which achieves the above range. The example shown in Figure 2 illustrates how to assign the AD5560 to achieve these output ranges.

High Current (HC) Power Path Diodes

Because the AD5560 can source high current, providing current ranges up to 1.2 A, these supply rails can be divided into three different types: the low current range (5 μA to 25 mA) is powered by AVDD/AVSS; the middle current range (called EXT2) is powered by HCAVDD2/HCAVSS2; the high current range (called EXT1) is powered by HCAVDD1/HCAVSS1. The HC supply should always be equal to or less than the AVDD/AVSS supply rails. The purpose of the HC power rail is to allow the user to select a lower voltage power supply to reduce the power consumption of the AD5560. The EXT1 and EXT2 output stage designs require a supply voltage higher than the voltage of the device under test. If the HC power supply is lower than the AVDD/AVSS power supply, the above requirements may not be met. Therefore, we recommend adding a diode in the path between the HC power supply and the HC package pins (as shown in Figure 2). When the EXT1 or EXT2 stage turns off, we want it to stay off and not leak current into the device under test. This diode, along with the internal leakage resistor, will increase the HC package pin voltage (close to the AVDD/AVSS supply rails), allowing the EXT1/EXT2 output stages to remain off. Figures 3 and 4 show diode circuit details suitable for the EXT1 and EXT2 ranges respectively.

The diode needs to be able to carry the highest current that the output stage can deliver (including transient current/fault conditions). The current requirements of the EXT1 stage are likely to be much higher than the EXT2 stage, so when choosing diodes it is best to choose different diodes for EXT1 and EXT2 respectively (in terms of board size).

To minimize total power consumption and power overhead, the voltage drop should be as low as possible.

The leakage current or reverse current when the diode is turned off should be low enough to ensure that the HC pin voltage can support the output voltage range of the device under test. The reverse current of the diode creates a voltage drop across the internal leakage resistors (33 kΩ for EXT1 and 100 kΩ for EXT2); therefore, the HC pin voltage decreases.

Suitable diodes are available from many suppliers, such as ON Semiconductor, Vishay, etc.

The diode can be replaced with a low on-resistance power MOSFET, as shown in Figure 5. Since the voltage drop across the FET is much lower than that of the diode, the advantage of using a MOSFET is that it can reduce total power consumption.

Please note that there is a parasitic body diode between the drain and source of discrete power MOS devices. The orientation of this diode must be the same as that of the commonly used diode that the MOS device replaces. At the same time, a suitable driver must be provided for the MOS gate.

This circuit must be built on a multilayer circuit board with a large area ground plane. For optimal performance, proper layout, grounding, and decoupling techniques must be used (refer to Tutorial MT-031, “Grounding Data Converters and Solving the Mysteries of AGND and DGND” , and Tutorial MT-101, "Decoupling Technology" ). Please note that Figure 1 is a schematic diagram and does not show all required decoupling. Careful consideration of power and ground return layout helps ensure rated performance is achieved. The printed circuit board (PCB) used to install the AD5560 should be designed to separate the analog and digital parts and be limited to a certain area of ​​the circuit board. If the AD5560 is in a system with multiple devices that require an AGND to DGND connection, the connection can only be made at one point. Place the star ground point as close to the device as possible.

Linearity measurement

Figures 6 and 7 show the linearity measurement results of the system in FVMV (Forced Voltage, Measured Voltage) mode. Figure 6 shows the linearity of the skewed supply (+28 V, −5 V). For this specific gain setting (MEASOUT GAIN = 0.2), linearity performance degrades under skewed supply conditions. Figure 7 shows the linearity improvement for symmetrical supplies (±15 V). Both measurements were made using the AD7685 ADC and the circuit shown in Figure 1. For a symmetrical power supply, the linearity measurement results in FVMI (forced voltage, measured current) mode are shown in Figure 8.

temperature measurement

An example of the temperature gradient measured with the ADT7461A is shown in Figure 9. The radiator used here is just a simple radiator and there is no air flow. The purpose is to help us understand the chip temperature gradient using the on-chip temperature diode at 1 A load; the power consumption is approximately 5.4 W. Diodes are numbered (as per the data sheet); this example cycles through a number of diodes at different points in time. Even with this simple heat sink, you can see a 17°C temperature difference across the chip.