Supercapacitor equalization plate

Project Musings: As a retired R&C enthusiast, my two years of R&C experience during my freshman and sophomore years resulted in a national first prize (11th place nationwide) in the first year and a national first prize (5th place nationwide) in the second year. The overall robot design is based on a differential steering wheel chassis with a geared rack and pinion system using RM3508 motors with ESC gearboxes, not direct-drive wheels. The power wheels are rubber-coated wheels from Benjamin XC5500 motors. Regardless of whether it's a three-wheeled or four-wheeled steering wheel chassis, under high-current robot chassis start-stop and braking conditions, with
a DJI TB47 5500Mah 5c discharge rate power source, the upper limit current, based on engineering practice and current clamp monitoring at the bus end, always fluctuates within a range of around 20A. Meanwhile, the Benjamin brushless FOC driver's Direct... The power output of MOSFETs can reach thousands of watts. In comparison, this is like using a sledgehammer to crack a nut; it cannot meet the power requirements within the upper limit. If another option is to replace the TB47 with a model aircraft battery at different discharge rates (C), we have used the 6S... The 35C model aircraft battery powers the three-wheeled steering wheel chassis assembly. During testing, it did perform better than the TB47. However, the disadvantage of model aircraft batteries is their low energy density; the output power is not ideal for the same weight. Furthermore, under extremely restrictive rules, the size of model aircraft batteries with high discharge rates cannot be reduced. To address this, the strategy shifted to using supercapacitors. The term "supercapacitor" often evokes RoboMaster, and indeed, our core concept originated from RM. However, RM is limited by rules and power controls, requiring supercapacitors to limit the power source. Otherwise, the UI on the RM panel frequently displays "Power Limitation," indicating a loss of health points. RoboCon, also a robotics competition, does not have power restrictions. It's well known that the brushless motor drive board developed by the University of Tokyo's electric drive group has a power limit of several kilowatts (while our Benjamin always explodes, even with Direct...). The residual potential of MOSFETs hasn't been fully realized... So, let's start with a basic introduction to supercapacitors: The following are notes on my basic understanding of supercapacitors during the preparation process.
Understanding Supercapacitors: (Careful reading of these notes will give you a deeper understanding of supercapacitors)

———————————————————————— Basic Introduction to Supercapacitors ——————————————————————————————
Brief: High-energy-density electrochemical capacitors
① Supercapacitors: Electrochemical elements that store energy through the polarization of electrolytes.
Supercapacitors are a type of power source with special properties, falling between traditional capacitors and batteries. They primarily rely on the double layer and redox pseudocapacitance to store electrical energy.
Furthermore, their energy storage process does not involve chemical reactions; this energy storage process is reversible, allowing supercapacitors to be repeatedly charged and discharged hundreds of thousands of times.
Advantages:
① Achieves F-farad level capacitance in a very small volume.
② No special charging circuit or discharge control circuit is required.
③ Overcharging and over-discharging will not negatively impact battery life.
Disadvantages:
① Improper use: Electrolyte leakage phenomenon
② Compared with aluminum electrolytic capacitors, its equivalent ESR is too high, so it cannot be used in AC circuits. Application environment limitations:
Compared with lithium batteries, the current bottlenecks of supercapacitors are: ① Energy density ② Voltage withstand performance ③ ESR ④ Size ⑤ Cost.
Classic application scenarios:
① In situations where power is frequently lost, supercapacitors can perform rapid charge and discharge and repeated cycles of hundreds of thousands of times, while batteries only last for a few hundred cycles.
② In situations requiring high instantaneous power output, such as the instantaneous start-up of a car motor, using supercapacitors with low ESR can help the motor start quickly.
③ Superior pulse power performance, suitable for products that repeatedly deliver electrical pulses in a very short time. Conversely, repeated high-power pulses significantly reduce the lifespan of batteries.
④ Supercapacitors are different from batteries; supercapacitors may be superior to batteries, and sometimes the two are combined, combining the power characteristics of capacitors with the high energy storage of batteries.
⑤ Supercapacitors can be charged to any potential within the rated voltage range and can be completely discharged. Batteries will suffer permanent cycle damage due to over-discharge.
⑥ The state of charge (SOC) of supercapacitors is a simple function of voltage, while the state of charge of batteries involves various complex calculations.
Selection of supercapacitors:
① Determining power requirements, discharge time, and system voltage changes plays a decisive role.
② The output voltage drop of the supercapacitor consists of two parts: one part is the energy released by the supercapacitor; the other part is caused by the internal resistance of the supercapacitor. Which part is dominant depends on time. In very fast pulse energy, the internal resistance accounts for the majority; conversely, in long-term discharge, the capacitive part accounts for the majority.
③ Maximum operating voltage + operating cutoff voltage —————————————————————————Supercapacitor and Balancing Circuit————————————————————————————————
① Supercapacitors are widely used for short-term high-energy storage, regenerative braking, and static random-failure memory backup.
Key features: ① Fast charging speed: over 95% of rated capacity can be reached in 10 seconds to 10 minutes;
② Long cycle life: deep charge-discharge cycles can reach 10,000 to 500,000 times, with no memory effect;
③ Extremely strong high-current discharge capability, high energy conversion efficiency, low process loss, high-current energy cycle efficiency >= 90%;
④ High power density, reaching 300W/KG-5000W/KG, equivalent to 5 to 10 times that of batteries
(Energy density: the energy that a unit weight of battery can store, unit Wh/kg) (Power density: the rate at which a unit weight of battery outputs energy when discharging)
Power density mainly describes the battery's rate of discharge, that is, the battery's discharge rate, that is, how much current the battery can discharge. For example, with high power density, electric vehicles accelerate very quickly. Ordinary lead-acid batteries have a very low power density W/KG, indicating that even at a high discharge rate, their performance is very poor. Lithium-ion batteries, on the other hand, can reach a power density of several kilowatts/kg. ）(2) Why do supercapacitors need balancing capacitors?
In the design, when the operating voltage of a supercapacitor often reaches 2.5V-2.7V, most applications will use a series of series devices to obtain a higher voltage. To balance a supercapacitor, a balancing circuit is needed because supercapacitors will generate leakage current. This current will vary depending on various factors, including:
(1) Initial leakage value
(2) Leakage value varies with charging voltage, charging current and temperature
(3) Operating temperature range
(4) Chemistry, materials and structure
(5) Aging
To prevent this imbalance, a balancing circuit must be used. This balancing circuit automatically corrects the effects of constantly changing leakage current, ensuring that the voltage passing through each supercapacitor is within a defined range, and all these passing capacitors require minimal additional leakage current or power consumption. A good balancing circuit can respond quickly to abnormal cells. There are two methods for balancing supercapacitor cells: passive balancing and active balancing.
a. Passive balancing circuit
(1) The structure of the resistor directly connected in parallel with the supercapacitor is actually to connect a resistor in parallel with each cell to suppress the leakage of electricity. In fact, it is to use a resistor with very small tolerance to force the voltage of the individual modules to be consistent. Because during the charging process of the supercapacitor, the internal resistance determines the magnitude of the charging current and the final voltage. After the supercapacitor is charged, the self-discharge internal resistance is another important parameter. A small resistor can be used to achieve voltage balance between the cells of the supercapacitor. The resistance value should be much larger than the internal resistance of the supercapacitor, but smaller than the self-discharge resistance. Different resistance values ​​result in different voltage balance process times.
(2) The structure of the resistor connected in parallel with the switch controls
a switch connected in series with the resistor in the above structure. When the cell voltage exceeds the preset voltage value, the switch is turned on to perform the balancing function; when the cell voltage is lower than the preset voltage value, the switch is closed. This structure requires measuring the cell voltage, which increases the cost.
(3) The structure using a DC/DC converter
connects a DC/DC converter between adjacent cells to balance the specific voltage. There are no other losses except for the converter loss. The efficiency is higher than the above two balancing methods. However, due to high hardware implementation and control costs, it is rarely used.
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b.
How does an active balancing circuit work? Active balancing takes less time than passive balancing, and the voltage distribution accuracy is the same. Moreover, parasitic losses are low. If the limit voltage is reached, the circuit balances through a bypass effect of a small-power resistor connected in parallel with the supercapacitor. The function of this resistor is the same as in passive balancing, but because the balancing current is large and the balancing process is very short, the resistor has no effect below the limit voltage, and the charging current is very large. When the bypass part is active, the current can be higher, but this is limited by the parallel resistor (generally, the upper limit current is 1A). Therefore, this circuit is rarely used in automobiles because the charging current generated by brake feedback during vehicle braking is greater than 1A, which would damage the entire circuit. c. Chip Application Examples: Characteristic Curves: ————————————————————————RM Supercapacitor Roundtable Forum——————————————————————————
① Strange, it says here that the ESR inside the EDLC is very small, meaning the internal resistance (ESR) is extremely low. This allows for rapid discharge, but there is a risk of electrical sparks. ② The voltage fluctuation within the cycle is large, and the discharge is unbalanced, requiring the use of a DC-DC circuit.
——————————Supercapacitor Calculation Formula————————————————————————————————————————————————————————
① When capacitors are connected in series, the capacitance C decreases (the total capacitance after series connection is calculated using the parallel connection method for resistors), and the withstand voltage V increases.
② When capacitors are connected in parallel, the capacitance C increases (each capacitance increases; the parallel connection method is calculated using the series connection method for resistors), and the withstand voltage V is calculated with the minimum.
③ In summary, the more capacitors connected in series, the higher the withstand voltage, but the capacitance decreases, so parallel connection is still needed to increase the capacitance.
④ Formula for calculating the capacitance of a single supercapacitor (2.7V, 470F): ⑤ Formula for energy release from a capacitor: ⑥ Formula for energy storage in a capacitor: —— ... ② Features: Can protect 2.5V and 2.7V capacitors. ③ Overview: The built-in power transistor enables a 0.7A leakage current capability after overcharge protection. It can also select two types of supercapacitors for charging protection via an external port. When the selection port is high, the corresponding protection point is 2.65V (corresponding to a nominal 2.7V capacitor); when the selection port is low, the corresponding protection point is 2.45V (corresponding to a nominal 2.5V capacitor). ④ Typical Application Circuit: If no external current-boosting transistor is used, IOUT can be directly connected to a small resistor to leak current to GND. ⑤ Pin Configuration: IOUT: Leakage port; SEL: Internal voltage protection selection port, corresponding to two different nominal capacitors. ⑥ Max Value: The internal current-boosting transistor Iout has a maximum capacity of 1A. ___________________________________________________ Divider ______________________________________________ ① TI Texas Instruments' BQ24640 is a highly integrated supercapacitor switching mode charging control IC. This device provides a constant current and constant voltage charging mode for 1-8 supercapacitors (similar to the constant current source required for supercapacitors) and features charging status monitoring, temperature detection, and input enable functions. ② It uses a constant frequency synchronous PWM controller to charge the supercapacitor via the current on the ISET pin. ③ Features: Programmable input voltage range, charging voltage range, and charging current; input undervoltage lockout, output overvoltage protection, and short-circuit protection. Charging is enabled or disabled via the CE pin, and the STAT and PG pins report the charging and adapter status. The TS pin detects the supercapacitor's temperature, pausing charging if it's too hot or too cold. ④ Typical applications: Robocon application scenarios related to supercapacitors: (Newbing real-world application) ① TI's BQ24640 is a highly integrated supercapacitor switch-mode charging control IC. It provides a constant current and constant voltage charging mode for 1-8 supercapacitors (similar to the constant current source required for supercapacitors) and features charging status monitoring, temperature detection, and input enable functions. ② An overcharger controller employing a constant-frequency synchronous PWM controller can charge the overcharger via the current on the ISET pin. ③ Features: Programmable input voltage range, charging voltage range, and charging current; input undervoltage lockout, output overvoltage protection, and short-circuit protection. Charging is enabled or disabled via the CE pin, and the STAT and PG pins report the charging and adapter status. The TS pin detects the overcharger's temperature, pausing charging in case of overheating or overcooling. ④ Typical Applications:




 



⑤ Pin definitions: (1) VIN: Input voltage pin, connected to the positive terminal of the power adapter. (2) GND: Ground, can be connected to the negative terminal of the adapter and the supercapacitor. (3) BAT: Output voltage pin, connected to the positive terminal of the supercapacitor. (4) ISET: Charging current setting pin, the charging current is set by grounding a resistor. (5) VFB: Charging termination voltage feedback pin, the charging termination voltage is set by grounding a voltage divider resistor network. (6) TS: Temperature sensing pin, the temperature of the supercapacitor is detected by grounding a thermistor, and charging is suspended if it is too hot or too cold. (7) CE: Charge and discharge control enable pin. , high active or low active, used to enable or disable charge and discharge control function (8) STAT: status indicator output pin, open drain output (requires external pull-up) can display charge and discharge control status (9) PG: power good indicator output pin, open drain output, used to display whether the input power is normal (10) BOOT: bootstrap supply input/output pin for driving MOS gate, requires an external ceramic capacitor of more than 100nf to the PHASE pin (11) PHASE: connection point input/output pin between synchronous rectification MOS source S and driving MOS drain D (12) SRP, SRN: synchronous rectification MOS gate G drive output/feedback input differential pair pin (13) DRVH, DRVL: driving MOS gate drive differential pair output/feedback input differential pair pin Question: For example, how to use it to charge a total of 9 strings of 6.67F 24.3V supercapacitor modules? Question: Why can't I use a student power supply to charge the supercapacitor directly, but have to use the BQ24640 chip? Because this chip can perform constant voltage and constant current charging of supercapacitors. Question: Why is a balancing design necessary for supercapacitors? Question: But can't the BQ24640 perform constant voltage and constant current charging of supercapacitors? Why is voltage balancing still necessary? Isn't voltage balancing also for voltage distribution? Why is a main controller needed to manage it, for example, to collect voltage and current information from the supercapacitor ? Suppose I have a motion robot system, and I want to power it with both a 24V power supply and a supercapacitor. I want to use a BQ24640 to manage the supercapacitor's charging and also implement voltage balancing. Finally, I want a main controller to collect voltage and current information from the supercapacitor to determine its charging and discharging status. I want to use both the 24V power supply and the supercapacitor together when the system starts up because it requires a large current, use only the 24V power supply during smooth operation, and use only the supercapacitor during braking. Could you explain the design and process? My competition time is 3 minutes, and I want to complete the entire 3-minute competition using only the 24V power supply and the supercapacitor. However, I don't know if the supercapacitor's stored energy is sufficient for 3 minutes of discharge. For example, what are the appropriate parameters, or do you have any better suggestions? Question: Selection of supercapacitors. The formula for calculating the total capacity of a supercapacitor is: Total capacity of a supercapacitor = Capacitance of a single capacitor / Number of capacitors in series. Question: I want to use a 24V power supply with a maximum output power of 270W connected in parallel with supercapacitors to power a circuit with a load of approximately 15A for 3 minutes. I would like to ask what parameters the supercapacitors should meet, that is, at least how many in series and how many in parallel are needed to provide power for 3 minutes. Question: I want to build a supercapacitor module to power my system along with my 24V power supply. Could you tell me how to design it? I hope you can explain the equalization design and charging management design of the supercapacitor. Question: I'm using 2.7V, 60F supercapacitor cells to form a 9-series supercapacitor module. How can I design it to power my system with a 24V 270W power supply? Question: Could you elaborate on the chip selection, including the energy storage capacity and total capacity of the 9-series 2-parallel module you mentioned (2.7V 60F)? Question: I'm currently using a 2.7V 100F HP-2R7-J107UY supercapacitor. How many series and parallel configurations are needed to achieve the desired power supply effect with a 24V 270W power supply ? Question : Assuming the system needs to maintain a constant 270W and the minimum operating voltage is 12V ... I have an HP-2R7-J107UY supercapacitor and a DJI TB47 battery to power my motion robot. The TB47 has a discharge rate of 5C, and my robot's overall load should be 20-30A for 3 minutes. How many series and parallel supercapacitors do I need to meet the basic requirements? (
 
Higher Education Supercapacitor Technology Document Analysis:

——————————————------------------——— Harbin Engineering University Supercapacitor Technology Document Analysis ——————————————————————————
Notes:
1: Balanced version (single cell balance) 2: Protection board (overvoltage protection) 3: Control board (voltage, current, power detection, feedback parameters, also called management board)
① To prevent relay contact tethering, the relay on the supercapacitor management board can be replaced with a PMOS.
② Insulate the front of the board!
③ The ideal diode powers the capacitor and provides self-locking for the capacitor power supply; it cannot be deleted. The SK1045 Schottky diode is to prevent ideal diode failure; during testing, it should be connected in solder.
④ Use 2.7V 60F supercapacitor cells.) A 9-cell supercapacitor module is formed. ⑤ The voltage equalization section uses the commonly used BW6101 to improve circuit stability. The NMOS selected is A04402. Its advantages include low internal resistance, high current, and low cost. The bleeder resistor uses a 2R, 2512, 3W surface-mount power resistor. (The bleeder resistor must have a sufficiently small R value; for large current and high power, a large power rating is required, resulting in a large package size.) ④ Principle analysis: The typical protection voltage of the BW6101 is 2.65V (this is the typical overcharge voltage protection point). When the voltage across the capacitor is >2.65V, the internal current diffuser of the chip's internal bleeder switch turns on. Simultaneously, an external NMOS current diffuser is connected, directly discharging the next stage capacitor through the 2R bleeder resistor to ensure no overvoltage across the capacitor. Once the voltage across the capacitor exceeds 2.75V, the overvoltage indicator light illuminates to detect the module's operating status.
⑤ Solution verification: A minimum of 2.66V and a maximum of 2.73V are normal. ⑥ Module energy storage calculation: Substitute the above C capacity and U to calculate the theoretical stored energy. (How to convert J and kWh?) ⑦ Supercapacitor topology overall: (1) Overview of supercapacitor management and control board: (2) Introduction: Main controller: STM32F405RGT6 is used, charging management: TI Texas Instruments BQ24640 is used. This chip is a highly integrated switch-mode supercapacitor charging controller, which can provide a constant frequency synchronous PWM controller with high-precision charging current, voltage regulation and charging status monitoring. Supercapacitor charging is divided into two stages: constant current and constant voltage (CC/CV). The MCU's DAC is used for digital-to-analog conversion to control the charging. The I2C INA226 is used for high-side sampling voltage detection. Control section: Mainly responsible for power control, capacitor charging and discharging power section: The main topology of the circuit, mainly to avoid the power limitation of RM rules. Charging section: Mainly the supercapacitor charging circuit.
Control Section Schematic Diagram: Power Section Schematic Diagram: Charging Section Schematic Diagram: Power Section Introduction: ① Relay Selection + ② Sampling Resistor Selection. The relay, as part of the wiring connecting the chassis and the supercapacitor, should have a strong current-carrying capacity to provide a large current for rapid robot startup. The sampling resistor, as another part of the wiring connecting the Lianwei chassis and the supercapacitor, should also have a strong current-carrying capacity to provide a large current for rapid robot startup. It should also have good thermal stability to provide more accurate sampling data for the INA226. Comprehensive consideration: The ideal diode schematic diagram is as follows. Scheme verification: In actual use, the charging efficiency of the capacitor is above 94%, and the discharging efficiency is only affected by the internal resistance of the supercapacitor, the resistance value of the resistor, the impedance of the relay contact, and the impedance of the PCB copper foil. The voltage of the supercapacitor can be limited to above 14.5V, that is, the effective energy: 1250J. -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
———————---------------------------------———— Central South University FTY Supercapacitor Technology Document Analysis ———————————— ———————————————————
①RM19 Season Scheme: Use BQ24640 as the charging chip and INA226 as the current, voltage, and power detection chip.
②RM20 Season Solution: ③BQ24640 Explanation: The BQ24640 is also a highly integrated switch-mode supercapacitor charging controller. It provides a constant-frequency synchronous PWM controller with high-precision charging current, voltage regulation, and charging status detection. It adopts a two-stage charging method: constant current CC followed by constant voltage CV. It supports 1-6 batteries, with an input voltage range of 5V-28V and a maximum charging current of 10A. ④Pin Definitions and Descriptions: ⑤Please recommend some supercapacitors related to the BQ24640 . ⑥What is the difference between BW6101 and BQ24640? ⑦I heard that BW6101 is used to balance the voltage between individual capacitors, not for charging protection. For example, if I connect 9 series of 2.7V 50F supercapacitors to form a balancing board, I can still charge them with a 24V power supply. What is the difference? ⑧Is the BQ24640 an active balancing solution? Could you recommend some solutions for charging protection and active balancing of 9 series 100F 2.7V supercapacitors? ⑨ I still don't understand the difference and connection between charge/discharge controllers and balancing. Didn't you say the BW6101 is a passive balancing solution? You also said that the BW6101 and BQ24640 are both charging chips for supercapacitors, so why can the BW6101 perform passive balancing but the BQ24640 can't? And what is a charge/discharge controller? How exactly does it work and what does it mean? ⑩ Could you provide me with a schematic diagram of the BQ24640 used for charge/discharge management of 9 series 2.7V 100F supercapacitors? Also, I'd like to ask if passive balancing automatically balances the voltage between individual cells when charging with a 24V power supply, thus maintaining the overall voltage at its optimal state? Or does it only ensure that each individual capacitor reaches its optimal state, but if all individual cells reach their optimal state, then the entire capacitor bank will also reach its maximum state? Once it reaches its maximum state, doesn't that mean the charging/discharging current is appropriate? Why is a charge/discharge controller still needed? 11) Do you mean that for a supercapacitor bank, it's best to design both equalization and charge/discharge protection schemes? Could you provide me with an active equalization scheme and a charge/discharge management scheme to provide protection for the supercapacitor together? Or could you provide a more detailed introduction to the features of the BQ24640 ? ——
... Features: This synchronous switch-mode overcharger features a maximum charging current of 10A, up to 90% efficiency, high-precision charging current, voltage regulation, and constant-frequency synchronous PWM controller with charging status monitoring. It has a 5V-28V VCC input voltage range , built-in internal loop compensation, digital soft-start input overvoltage protection, capacitor temperature sensing, and features hot/cold charging pause and thermal shutdown. It also boasts a 30ns driver dead time and up to 99.5% duty cycle. Automatic sleep mode with low power consumption is also included. Charging phase: CC->CV. Overcharge starts from 0V, and the charging current can be set via the ISET pin. When the overcharge voltage reaches the target programming voltage, the charging current I starts to decrease. It has CE pins for enabling and disabling charging, and the STAT and PG output pins report charging and adapter status. The Ts pin monitors the capacitor temperature. Pins: BTST: PWM high-side driver positive power supply, typically connected from PH to BTST with a 0.1uF self-contained capacitor. CE: Charge enable pin, active high-level logic input. HI is for enable charging, LO is for disable charging. A 10KR pull-up resistor is commonly used to pull it up to the CE rail. It has an internal 1MR pull-down resistor. GND: Low-current sensitive analog/digital ground, PCB layout, connected to the thermal GND pad under the IC. HIDRV: PWM high-side driver output, connected to the gate of the high-side N-channel MOSFET via a short wire. ISET: Charging current setpoint, voltage set from VREF to ISET to GND via a resistor divider . LODRV: PWM low-side driver output, connected to the gate of the low-side N-channel MOSFET via a short wire. PG: Open-drain active low-level adapter status output, connected via an LED and a 10KΩ resistor. PH: Switching node, charging current output inductor link, connected from PH to BTST via a 0.1uF boot capacitor. REGN: PWM low-side driver positive 6V power supply output, a 1uF ceramic capacitor is connected from REGN to the GND pin close to the IC for both low-side and high-side driver boot voltages. A small-signal Schottky diode connects REGN to BTST.


 





















SRN: Charging current sensing resistor, negative input. A 0.1uF ceramic capacitor is placed between SRN and SRP to provide differential mode trace filtering. An optional 0.1uF ceramic capacitor can be placed between SRN and GND for common mode filtering.
SRP: Charging current sensing resistor, positive input. A 0.1uF ceramic capacitor is placed between SRN and SRP to provide differential filtering. A 0.1uF ceramic capacitor is also placed between SRP and GND for common mode filtering. STAT
: Open-drain charge status output, indicating charger operation. Connects to the LED via a STAT pull-up resistor.
TS: Negative temperature coefficient thermistor pin temperature confirmation voltage input, programmed via the same frequency converter and low-temperature window from VREF to TS to GND. A SEMITEC 103AT-10-kΩ resistor is recommended.
Voltage Pin:
VCC: IC power supply positive. Ideally, it should be connected to the cathode of the input diode via a 10R resistor. Place a 1uF ceramic capacitor between VCC and GND, close to the IC, to filter noise.
VFB: Charging voltage analog feedback adjustment pin. Connected from the output to GND via a resistor divider, it adjusts the output voltage. Internal feedback regulation is limited to 2.1V.
VREF: 3.3V reference voltage output pin. Place a 1uF ceramic capacitor near the pin. The pin voltage can be adjusted via the programmable ISET charge current regulation and TS thermal threshold, and can be used as a pull-up rail for STAT and PG. Typological Application:
Adapter: Power adapter . Experimental conditions:
①Vin DJI battery: 24V
②Vout 9-series supercapacitor: 23.85V
③Set charging current Icharge: 10A.
Experimental principle: First, the PWM Control Logic generates dual PWM waves. One wave passes through an inverter to form a complementary PWM wave, which is then input to the upper and lower push-pull circuits, forming complementary high and low-end PWM waves. PH is the high-side floating ground, and GND is the low-side real ground. Assuming Q2 is turned on first on the low side of LODRV, the PH node of the high-side MOSFET is 0V. Simultaneously, the internal LDO of BTST drops to 6V, clamping the bootstrap capacitor between BTST and PH to 6V. Since PH is at 0V, and the high-side PWM of HIDRV is assumed to be a 24V power input, Vgs is turned on, and PH is pulled up to VCC (24V). Because the bootstrap capacitor is charged to a voltage difference of 6V, the capacitor voltage cannot change abruptly. When the lower MOSFET is turned off, it will still maintain 6V, causing BTST to rise to 30V. However, REGN remains at 6V, leading to reverse current. Therefore, a Schottky diode is added across REGN and BTST. This bootstrap capacitor typically has one pin connected to the high-side floating ground, and the other pin connected to the negative terminal of the anti-reverse-current Schottky diode and the negative terminal of the power output. The positive terminal of the Schottky diode is connected to the positive terminal of the power output. Because only one NMOS transistor can be turned on at a time, if the lower transistor turns off, the floating ground will change from 0V to VCC. At this time, PH (Vs) = VCC, the bootstrap capacitor is also Vcc, and the high-side drive HIDRV is also VCC. Therefore, the Vgs turn-on condition cannot be formed. Since PH is VIN, and BST is the 6V voltage from REGN through the Schottky barrier, the capacitor voltage does not change abruptly, clamping the bootstrap capacitor to 6V. Therefore, Vg will become Vin + 6V, and Vs will still be Vin, allowing the upper transistor to turn on. Normally, after 10uH, the BUCK output voltage will be formed at that point. Then, 10mR is equivalent to high-side current sampling. One pin of 10mR enters SRP (IN+), and the other pin enters IN- (SRN). The voltage drop across the sensing resistor is obtained through the internal IC, and then I = V/R is used to obtain the current I flowing to the load VOUT. The explanation of this bootstrap capacitor is excellent:
 
Analysis of supercapacitor models from various supercapacitor YouTubers:

Background: ①STM32F334 CNC power supply bidirectional BUCK-BOOST
overall system framework: Physical demonstration: Supercapacitor module: Unlike traditional passive balancing schemes, this uses a switched capacitor main control balancing voltage equalization circuit. The fourth part controls this active voltage equalization circuit, which is essentially outputting a PWM and controlling its enable. Overall schematic diagram: Nine gate driver chips DR04D (currently discontinued; other gate driver chips can be used as substitutes). Nine supercapacitors are connected in series to form a supercapacitor group. Each supercapacitor group is equipped with a voltage equalization circuit module, which is actually composed of four MOSFETs and their corresponding voltage equalization capacitors . General principle: The principle of the switched capacitor active balancing voltage equalization circuit: In the topology diagram on the right, firstly, all switches on the right are closed. After closing, each capacitor is charged to the point where the voltage corresponding to each individual supercapacitor is equal. Then, the switch on the left closes, and the switch on the right opens. When the switch on the left is closed, it is equivalent to all capacitors being connected in parallel to achieve voltage equalization. The final effect achieved is that all these capacitors are connected in parallel. Then, a Simulink simulation of the switched capacitor active equalization circuit was performed to investigate the factors affecting the voltage equalization rate. It was found that the switching frequency has a more significant impact on the voltage equalization rate, so a 100kHz switching frequency MOSFET was used. Why not a higher frequency? Because driving our MOSFET at a higher switching frequency is more difficult and the losses are greater. The power control module consists of 13 parts, the main parts being: ① The main circuit of the bidirectional BUCK-BOOST uses a point-to-line copper wire inductor manufactured by WE. The structure of the entire power control module: The schematic diagram of the power control module: First, our VBAT undergoes transient suppression via a TVS.
 

Flowchart: The total power can be set via the CAN bus. Bus 2 uses a supercapacitor for buffering, and bus 3 can be directly connected to the chassis for power supply. BUCK circuit: ① Asynchronous rectification: composed of a switching transistor, D1, L, and C. Because the diode voltage drop remains constant under varying output current, there will be a conduction voltage drop during forward conduction. The current multiplied by the voltage drop is the power consumption above the loss. The efficiency is relatively low, but it is cheap. Only one switching transistor needs to be controlled because the structure is simpler.
② Synchronous rectification: The diode is replaced with a switching transistor. Because of the lower on-resistance and lower voltage drop of the MOS, its power consumption is relatively small. However, Q1 and Q2 form a half-bridge topology, and the dead time control needs to be considered because the two transistors are complementary, that is, one is on and one is off, and they cannot conduct at the same time. --> Introduction to short-circuit supercapacitors: Based on 10 50F supercapacitors connected in series, the rated voltage is 2.7V. With 10 connected in series, the withstand voltage is increased to 27V. Then, 10 50F capacitors form an equivalent 5F capacitor. The rated capacity Q=0.5×CV, so the corresponding energy can be calculated. At the same time, because the characteristics of the individual supercapacitors are different, a balancing circuit is needed. Here, a passive balancing scheme is adopted. Passive balancing: When the voltage exceeds the protection voltage of the individual capacitor, the excess voltage will be released in the form of current. Practical application example: Assuming a 5F supercapacitor is used as the power source, the initial operating voltage means the operating voltage required to fully charge the supercapacitor. The cutoff operating voltage is the voltage at which the supercapacitor bank will stop working if it falls below this cutoff voltage. For example, the minimum voltage of a C620 ESC is around 15V, and some devices have a minimum operating voltage of around 12V. Therefore, the calculated continuous operating time is 3 minutes, but in reality, it will be shorter because it depends on efficiency and energy loss during charging and discharging.Solution: The Q, D, L circuit inside the circle represents the BUCK circuit. The load of the BUCK circuit is a supercapacitor bank, and a switch has been added. When the switch is closed: when the battery is connected, the supercapacitor bank supplies power to the load; when the battery is disconnected, the supercapacitor bank disconnects power to the load. The switch is a high-side, high-side power switch made of PMOS. The ideal diode here has two functions: ① Preventing reverse current. If the supercapacitor voltage is higher than the lithium battery voltage, reverse current may occur. Because in the synchronous design of the two MOSFETs on the left, the upper MOSFET Q1 actually has a body diode, which creates a current path, leading to reverse current. ② A very important point: preventing reverse boosting in the BUCK circuit. In some cases, without the ideal diode, looking from the supercapacitor to the lithium battery, an L, D, Q boosting topology will be formed, leading to reverse charging of the lithium battery. Texas Instruments (TI) has a document specifically about how to mitigate the problem of reverse current in synchronous BUCK circuits. ---> This problem is particularly serious in bidirectional BUCK-BOOST circuits. A filter capacitor bank with a smaller capacitance than the supercapacitor is connected in parallel. Our control system ensures a constant input power from the lithium battery to the entire system. How the chassis consumes power from the supercapacitor bank is not controlled by this system; the power consumed depends on the chassis load. This means the BUCK circuit is a very reliable solution because: ① it doesn't interfere with the chassis's power intake from the supercapacitor. Regardless of the chassis's power consumption, it's all from the supercapacitor. ② It controls the input power to be constant, meaning the pin will never exceed our set power. For example, if I need my pin to always be at the lithium battery voltage, improper control could easily cause it to overheat and explode, or the output voltage to become too high, damaging the chassis. ---> The BUCK circuit's output voltage is always lower than the input voltage, and the supercapacitor bank, as the load, always receives a voltage lower than the lithium battery. How are the two switching transistors Q1 and Q2 driven? Since our drive signal is a duty cycle (D), how do we ensure that our drive signal is within the dead time? If both transistors are turned on simultaneously, a short circuit will occur. This means the upper and lower transistors are always complementary. The upper transistor is on, and the lower transistor is off; conversely, the upper transistor is off, and the lower transistor is on. There must be a dead time between them. For example, the waveforms of Q1 and Q2 must be complementary. Dead time: The instant the upper transistor changes from off to on, and the lower transistor must have a certain margin to avoid simultaneous on/off cycles affecting the system. Using NMOS as a half-bridge driver: Because of the two NMOS transistors, Q1 and Q2 form a half-bridge structure. The LM5106 is chosen here mainly because of its small size. To the left of the two driving MOS transistors is the freewheeling diode connected in parallel with the lower transistor. The yellow coil is the inductor L. Why is a freewheeling diode for the lower transistor needed? Draw the complete rated half-bridge driver structure diagram: This half-bridge driver LM5106 has a rated RDT connected to GND with a resistor to set the dead time. IN is the input PWM signal, VDD is the power supply, and we need to consider the MOSFET drive voltage Vdsth. Here, VDD is 5V, and EN is high-level operation. There is a bootstrap circuit on the right that can simultaneously control Q1 and Q2. Detailed schematic explanation: Waveform timing diagram: When the EN pin is high, the system starts working. Because our NMOS is high-level conducting, it's equivalent to our LO conducting when IN (PWM) is low (LO is high at this time), and HO conducting when IN is high (HO is high at this time), which is a complementary state. The dead time is set by the resistor in RDT. Design flowchart: Schematic requirements explanation First, a minimum system is needed: Here, the STM32F042 has a built-in crystal oscillator, so an external crystal oscillator is not needed. Then there are indicator lights, serial communication leads RX and TX, a CAN bus connected chip, and a debug button. Next is the power supply section: First, let's clarify the voltage levels we need: First, the input voltage level is a 6S lithium battery, TB47. This voltage range isn't a constant 24V; the charging cutoff voltage is 4.2V, and the lowest voltage is approximately 2.5V. Therefore, the highest voltage range is 4.2*6, and the lowest is approximately 2.5*6 = 15V. However, DJI batteries have a protection system, meaning the battery voltage won't discharge to the lowest possible level. ① Our half-bridge driver LM5106 is set to a 9V peak PWM VDD, so we'll use MPS's MP2459 for 24-9V. Another step-down is to 5V and then step-down to 3V3 to power the microcontroller. ② H half-bridge section: ③ Sampling section: Which part of the current do we need to sample? We need to control the charging power of the TB47 battery to the system, so we need to sample the current flowing from the TB47 into the system. This part uses a 2W sampling resistor (0.008R) of the 2512 input current sampling resistor, paired with an INA240A2 sampling chip. This sampling chip is a current sampling amplifier chip, a fixed current sampling chip with 50x amplification, which can be used on both the high and low sides. It can sample both forward and reverse voltages. Simultaneously, we need the power from the TB47 to the input to the system, which means we need to know the voltage. We use a resistor voltage divider for detection, while simultaneously monitoring the voltage of the supercapacitor bank –> resistor voltage divider. Schematic explanation: ① To implement a BUCK capacitor supercapacitor constant power charging system, we need to consider what we need to design. -------> First, we need a main controller to collect the input voltage and current to generate a given duty cycle and then charge the supercapacitor bank. ② Monitor the charging of the supercapacitor bank, gradually charging it, the supercapacitor voltage will gradually increase, and then we will stop it when it reaches a certain voltage. ③ A basic switching function is needed: when the input power is cut off, such as when the battery is removed, the output voltage also needs to stop, which is a switching function. First, this is the minimum system of the microcontroller. Here, VDD and VDDA, VDDA is used to power the ADC. The current processing uses 0R and filter capacitor isolation, but there should be better processing: the CAN bus on the right requires a CAN communication chip with a 120R terminating resistor and a CAN bus socket, as well as a serial port debugging assistant with a button debouncing. If there is software debouncing, hardware debouncing is not necessary. A few indicator lights determine the solution: we plan to use an LM5106 MOSFET half-bridge driver chip to drive the half-bridge MOSFET. The VDD of this half-bridge driver chip depends on the turn-on voltage required by the externally selected MOSFET. We chose PSMN013-80, where 80 is the maximum withstand voltage value of Vds. Then, the current that Id can conduct is 60A, which is sufficient, but the MOSFET is not better if it exceeds the limit. A video will be released later to explain that Qg: total gate charge represents the voltage rating and current rating. MOS transistors with higher current ratings generally have larger junction capacitances, which affects their switching speed. Generally, higher voltage ratings and higher on-state current values ​​also result in a larger Rdson, which is the on-resistance. This has a significant impact; we prefer MOS transistors with lower Rdson. Pins 1, 2, 3, and 4 are generally: pin 4 is the gate (G), pins 1, 2, and 3 are the source, and pin mb is the drain. The key parameter to consider is Vgs, the turn-on voltage. There are two values: Vgsth = 4.5V, meaning the transistor only starts conducting above this voltage. The normal drive voltage should generally be greater than Vgsth and less than Vgsmax = 20V. If it exceeds 20V, the MOS transistor is prone to burning out.We've chosen a 9V drive voltage here, and considering the entire system uses a DJI TB47 or 6S lithium battery as the drive, its voltage is approximately 24V. Therefore, we need a step-down circuit: 24V - 9V to convert it into the drive voltage for the MOSFET. This part of the circuit is actually a BUCK; the MP2459 MPS BUCK chip has a built-in MOSFET, so the external circuit only needs a drain and a diode. The diode should be a fast recovery diode, such as a Schottky diode. The filter capacitors here can also be improved. We've chosen 10uF, 4.7uF, and 0.1uF, but a 100f capacitor could also be connected in parallel to create an output filter capacitor bank. Next is the circuit for stepping down from 9V to 5V, and from 5VJ to 3V3. Here, VCC_S mainly performs input filtering for the TB47, meaning the input battery needs filtering. In fact, our dual-diode switching circuit works like this: a small reverse connection protection mechanism. VCC is connected directly to the XT60 connector of the TB47, which is VCC. Then, through the diode, it becomes VCC_S, which serves as the main input voltage for the three BUCK circuits, supplying power to the power system, which we generally call the auxiliary power system. The auxiliary power supply is used to power our half-bridge driver and MCU, etc. Even if we remove the DJI battery, we can still use the VCC_CAP circuit, which draws power from the supercapacitor bank, to power the auxiliary power system. For example, after fully charging the supercapacitor bank with the TB47, and then removing the DJI battery, the supercapacitor still has charge and can continue to power our system. The upper right corner is very important: the power ground PGND of the entire system and the GND responsible for the digital part are isolated using a 0R resistor. This schematic diagram shows the digital ground GND. Next is the power BUCK circuit section: You'll notice a freewheeling diode connected in parallel to the lower MOSFET. We chose a PBS760 freewheeling diode, a very small surface-mount diode with its positive terminals on both sides and the negative terminal on the larger portion. A Schottky fast recovery diode is also used; fast recovery diodes have a faster reverse recovery time, making them ideal for BUCK circuits and higher frequency switching applications. It has a 7A overcurrent capability and a 70V reverse withstand voltage. Looking closely at the LM5106 half-bridge driver chip, we mainly connect: ① the drive signal HO1 for the upper MOSFET and LO1 for the lower MOSFET; ② the initial signal Bridge_en, which is connected to the microcontroller; ③ the PWM signal, which is connected to the MCU. Note that both of these signals are pull-down, and there's a 10K resistor (RDT) for setting the dead time. The chip's VDD pin has an auxiliary power supply bootstrap circuit composed of C6 and D5. This circuit provides the appropriate drive signal to the upper MOSFET. Note that D5 here is also a Schottky diode. The part circled in red is our BUCK circuit: On the right, a diode prevents the supercapacitor's current from flowing back to charge the battery. The supercapacitor's VCC_CAP comes from the P2 port, which is actually an XT30 connector. We have a high-side drive switch made of PMOS. Here, a transistor controls the MOS's gate voltage. When the enable_out pin is connected to the microcontroller and given a high level, the PMOS conducts, and VCC_CAP connected to VCC_OUT supplies power to the chassis. The function of the fast recovery diode in the lower transistor is: ① Mainly to show the performance difference between the body diode and the fast recovery diode in the MOS, due to the power consumption limitations of the MOS itself. Next part: What processing is done when the power interface VCC is connected to VCC_bridge? That is, when our VCC enters this half-bridge, firstly, current × voltage = power. For the sampling voltage, we use two resistors to divide the voltage for sampling. This part is not very efficient because our VCC is our power supply voltage, which is the DJI battery. It is connected to our VCC_AD through a diode. Then VCC_AD is connected here for resistor voltage division. VCC_AD is around 24V, and we need to step it down to a range that the microcontroller's I/O port can handle . Here, one is 100K and the other is 10K, with a voltage division ratio of 11/1. So, it can handle up to 33V, 3.3 x 11, so it won't exceed the limit. Then on the right is a circuit for acquiring the voltage of the supercapacitor VCC_CAP. Here, we added a diode for protection between VCC and VCC_AD, so the actual battery voltage should be VDD_AD + the forward voltage drop of our diode. Actually, this D7 can be omitted, but it's a conservative design. Then, between VCC and GND, we connected a transient voltage suppressor diode, i.e., a TVS, 30V, to prevent arcing of the switch. Then there is a filter capacitor bank: a 220uF electrolytic capacitor, but electrolytic capacitors have a large ESR, generate a lot of heat, and consume a lot of power, so solid capacitors are better. T