The circuit shown in Figure 1 is a low-cost, high-performance SOUNDBAR system that can receive analog stereo audio signals as input, and can also output up to 8 channels of audio and process the signals of each channel independently. This circuit is ideal for small expansion jacks and portable media devices. The circuit has low power consumption and high operating efficiency without degrading audio quality, and can drive headphones without the need for additional components.

The ADAU1761 is a low-power, stereo audio codec with integrated digital audio processing (also known as SigmaDSP® ⁾ that features two ADCs that accept two audio channels and digitally process them using the integrated SigmaDSP® ^core .

The SigmaDSP processor is optimized for audio applications, and easy-to-use SigmaStudio development software speeds development. Using a serial interface, the output of the ADAU1761 can send up to eight channels of digital audio data to the output amplifier. The ADAU1761 allows each channel to handle different audio signals, such as volume controls, custom equalization, filtering and spatialization effects tuned for specific speaker configurations. The ADAU1761 processes analog audio and converts it into a digital format signal to drive the SSM2518 power amplifier.

The SSM2518 is a digital input Class D audio power amplifier that outputs two audio channels into a 4 Ω load using 2 W of continuous power per channel. The channel mapping feature of the SSM2518 allows specific channels available in the interface to be selected for output signals. This feature makes it ideal for surround sound applications.

This circuit has two main modules. The first is the audio input and processing module, consisting of ADAU1761 . The second is the output amplifier stage, consisting of SSM2518 .

Audio input and processing

The input path of the ADAU1761 accepts two channels of single-ended or differential audio signals simultaneously. The input signal is sent to the DSP core of ADAU1761 for processing. Using ADI's SigmaStudio software, audio signal paths and processing algorithms can be established. SigmaStudio's built-in libraries allow different processing modules to be added to the signal flow. Once programmed, the user has full control over the different modules (such as volume control, equalizer and filters). The software speeds up the development process, allowing designers to quickly test and debug algorithms and configurations through an easy-to-use graphical interface.

Class D output amplifier

The SSM2518 Class D audio power amplifier receives serial data, performs digital-to-analog conversion, and drives speakers. Each SSM2518 can output two audio channels into 4 Ω speakers with 2 W of continuous power per channel. This circuit uses 4 SSM2518 and can output 8 channels of audio. The channel mapping function allows each SSM2518 to output two channels of signals from the interface. With this feature, each SSM2518 can output different channel signals.

I ² C access and configuration registers

ADAU1761 and SSM2518 both integrate internal registers and need to be configured before they can work properly. The SSM2518 has an address pin that allows only two devices to have unique addresses on the I2C bus ^. Four SSM2518 devices are configured by driving the ADDR pin of one device high while holding the other three devices low (it is also possible to drive one device low but keep the others high). The microcontroller or host uses the I ² C interface to configure the device's registers. Devices with unique addresses are now able to communicate with the bus and be configured. Repeat this process on the other three devices. Address control can be performed using a system controller; the system controller controls the logic levels of the address pins.

serial data interface

The serial data interface uses I ² S or TDM compatible data streams to transmit audio data. The transmitted signals include bit clock (BCLK), frame clock (LRCLK) and data (SDATA). The ADAU1761 is configured as a master and serves as a signal source for BCLK, LRCLK and SDATA, sending signals to the SSM2518. The device must be synchronized to the host clock MCLK for correct operation. Usually a 12.288 MHz crystal oscillator is used as the host clock. The on-chip frequency multiplier/divider of the ADAU1761 and SM2518 generates the required internal clock. Clock and signal lines must follow specific layout precautions. The internal capacitance of the ADAU1761 and SSM2518 must be considered to maintain clock and signal integrity. A buffer may be required to prevent loading effects.

The serial data signal can be configured as I ² S, TDM-4 or TDM-8 to carry 2/4/8 audio channels respectively within each audio frame.

Output Noise Voltage and Signal-to-Noise Ratio Performance

To measure the output noise voltage, ground or terminate the input to an appropriate impedance and measure the output voltage at the amplifier output. Using an A-weighted filter, voltage measurements can be made over a 22 Hz to 22 kHz bandwidth. The average measurement noise for all 8 channels is 66 μV rms. The signal-to-noise ratio referenced to a 2 W output and 4 Ω load is greater than 90 dB in all channels.

Output power and distortion performance

Output power and THN+N can be measured by applying a pure tone input and using an audio analyzer at the amplifier output. This circuit has good performance of less than 1% THD+N at 2 W rated output power using a 1 kHz sine wave as input, as shown in Figure 2.

Frequency response performance

The frequency response is measured by applying a pure sine wave at a fixed voltage level to the input while sweeping the frequency across the audio frequency spectrum from 20 Hz to 20 kHz. The voltage is measured at the output and compared to a 1 kHz reference level. The output power at 1 kHz is set to 2 W. The data shows that the output variation at different frequencies is less than ±0.5 dB. THD+N within the spectrum range is also less than 1%, as shown in Figure 3.