This reference design (RD) is for a dual-band CDMA front-end IC that uses a PCS-band signal path for 2.5GHz LEO satellite channel and a cellular-band signal path for GlobalStar IS-95 CDMA applications. The MAX2323 LNA plus mixer for dual-band CDMA handsets is featured.
Reference design (RD) is a dual-band, triple-mode CDMA front-end to a receiver whose frequency plan requires digital and AMPS analog IFs to be at 183.6MHz. RD uses the MAX2338, a low-noise amplifier (LNA) with mixer, that is useful for TDMA, GSM, EDGE, and WCDMA applications.
The Alcatraz (MAXREFDES34#) subsystem provides a reference design for securing Xilinx FPGAs to protect IP and prevent attached peripheral counterfeiting. The system implements a SHA-256 challenge-response between the FPGA and a DS28E15 secure authenticator. Boards for purchase, hardware, and firmware design files provide complete system information for rapid prototyping and development.
This reference design (RD) is for a dual-band CDMA front-end IC for use in automotive applications. The application circuit uses the MAX2323 low-noise amplifier (LNA) with mixer at temperatures up to 110°C. The device is also useful for TDMA, GSM, EDGE, and WCDMA applications. Schematics, bill of materials (BOM), and performance measurements are shown.
Reference design (RD) is a dual-band, triple-mode CDMA front-end IC in a receiver with all 183MHz IFs for processing cellular CDMA. The RD uses the MAX2323, a low-noise amplifier (LNA) with mixer, that is useful for TDMA, GSM, EDGE, and WCDMA applications.
This reference design (RD) is for a dual-band, dual-mode CDMA front-end for Japanese cellular CDMA at 110MHz IF. The RD uses a low-noise amplifier (LNA) with mixer, the MAX2325, that is also useful for TDMA, GSM, and EDGE applications. Schematics and bill of materials are shown.
This design is a PMOD with the ublox NEO GNSS receiver footprint. Able to receive GPS and GLONASS simultaneously.
Renesas is ready for the cold with a full lineup of power and analog components spec’d to operate down to -40 °C.
The SA636DK evaluation demonstration board is used to evaluate the RF development platform for 110.592 MHz RF and 9.8 MHz IF.
Renesas’ flower reference design showcases a diverse portfolio of products for broad market applications. From power management to precision analog and specialty ICs, we've got you covered for your designs.
The Sonoma (MAXREFDES14#) subsystem reference design performs accurate AC energy measurement while utilizing a unique, low-cost galvanic isolation architecture. The Sonoma meets the high-accuracy and low-cost needs of energy-measurement applications. This small form-factor design is available for purchase. Hardware, firmware design files, and lab measurements provide complete system information for rapid prototyping and development.
This reference design (RD) is for a dual-band, triple-mode front-end IC using only 85MHz IF centers for processing PCS, cellular CDMA, and cellular AMPS. The RD uses the MAX2323, a low-noise amplifier (LNA) with mixer, that is useful for TDMA, GSM, EDGE, and WCDMA applications.
This reference design (RD) for an RF mixer in the FM (AMPS) signal path custom tunes the output matching circuit to optimize the trade-off between IIP3 and the highest gain. The design features the MAX2324 low-noise amplifier (LNA) with RF mixer for cellular-band CDMA, TDMA, GMS, and EDGE applications.
This compact USB dongle design combines a MAX2165 direct-conversion tuner and a DMB-TH demodulator. The design converts a UHF signal (470MHz to 858MHz) to a MPEG-2 transport stream. Then the USB interface enables video viewing on a laptop or desktop computer.
Renesas Offers a Complete Solution for Powering Rad Hard FPGAs
This reference design (RD) shows how a downconverter with selectable LO doubler can be used as an upconverter. The RD achieves 9dB gain and 1.3dBm IIP3. The MAX2683 low-power downconverter designed to operate in the receive path of 3.5GHz wireless data transceivers is featured. Schematics, test setup, BOM, and performance results are shown.
High dynamic range RF transmitter signal chain with external single frequency reference for DAC sampling clock and IQ regulator local oscillator generation
I/Q modulator ADL5375 interfaces with dual-channel, 1.2 GSPS high-speed DAC AD9122